1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
22 #include "clk_freqs.h"
23 #include "PeripheralPins.h"
25 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
26 // determine the SPI to use
27 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
28 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
29 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
30 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
31 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
32 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
34 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
35 MBED_ASSERT((int)obj->spi != NC);
37 // enable power and clocking
38 switch ((int)obj->spi) {
39 case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break;
40 case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
43 // set default format and frequency
45 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
47 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
49 spi_frequency(obj, 1000000);
52 obj->spi->C1 |= SPI_C1_SPE_MASK;
54 // pin out the spi pins
55 pinmap_pinout(mosi, PinMap_SPI_MOSI);
56 pinmap_pinout(miso, PinMap_SPI_MISO);
57 pinmap_pinout(sclk, PinMap_SPI_SCLK);
59 pinmap_pinout(ssel, PinMap_SPI_SSEL);
63 void spi_free(spi_t *obj) {
66 void spi_format(spi_t *obj, int bits, int mode, int slave) {
67 MBED_ASSERT(bits == 8);
68 MBED_ASSERT((mode >= 0) && (mode <= 3));
70 uint8_t polarity = (mode & 0x2) ? 1 : 0;
71 uint8_t phase = (mode & 0x1) ? 1 : 0;
72 uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
74 // clear MSTR, CPOL and CPHA bits
75 obj->spi->C1 &= ~(0x7 << 2);
78 obj->spi->C1 |= c1_data;
81 void spi_frequency(spi_t *obj, int hz) {
83 uint32_t p_error = 0xffffffff;
87 uint8_t ref_prescaler = 0;
90 uint32_t PCLK = bus_frequency();
91 uint8_t prescaler = 1;
94 for (prescaler = 1; prescaler <= 8; prescaler++) {
96 for (spr = 0; spr <= 8; spr++, divisor *= 2) {
97 ref = PCLK / (prescaler*divisor);
98 if (ref > (uint32_t)hz)
101 if (error < p_error) {
103 ref_prescaler = prescaler - 1;
110 obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
113 static inline int spi_writeable(spi_t * obj) {
114 return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
117 static inline int spi_readable(spi_t * obj) {
118 return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
121 int spi_master_write(spi_t *obj, int value) {
122 // wait tx buffer empty
123 while(!spi_writeable(obj));
124 obj->spi->D = (value & 0xff);
126 // wait rx buffer full
127 while (!spi_readable(obj));
128 return obj->spi->D & 0xff;
131 int spi_slave_receive(spi_t *obj) {
132 return spi_readable(obj);
135 int spi_slave_read(spi_t *obj) {
139 void spi_slave_write(spi_t *obj, int value) {
140 while (!spi_writeable(obj));