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[qmk_firmware.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_NXP / TARGET_LPC15XX / TOOLCHAIN_IAR / startup_LPC15xx.s
1 /**************************************************
2  *
3  * Part one of the system initialization code, contains low-level
4  * initialization, plain thumb variant.
5  *
6  * Copyright 2009 IAR Systems. All rights reserved.
7  *
8  * $Revision: 28 $
9  *
10  **************************************************/
11
12 ;
13 ; The modules in this file are included in the libraries, and may be replaced
14 ; by any user-defined modules that define the PUBLIC symbol _program_start or
15 ; a user defined start symbol.
16 ; To override the cstartup defined in the library, simply add your modified
17 ; version to the workbench project.
18 ;
19 ; The vector table is normally located at address 0.
20 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
21 ; The name "__vector_table" has special meaning for C-SPY:
22 ; it is where the SP start value is found, and the NVIC vector
23 ; table register (VTOR) is initialized to this address if != 0.
24 ;
25 ; Cortex-M version
26 ;
27
28         MODULE  ?cstartup
29
30         ;; Forward declaration of sections.
31         SECTION CSTACK:DATA:NOROOT(3)
32
33         SECTION .intvec:CODE:NOROOT(2)
34
35         EXTERN  __iar_program_start
36         EXTERN  SystemInit
37         PUBLIC  __vector_table
38         PUBLIC  __vector_table_0x1c
39         PUBLIC  __Vectors
40         PUBLIC  __Vectors_End
41         PUBLIC  __Vectors_Size
42         
43         DATA
44         
45 __vector_table
46         DCD     sfe(CSTACK)                 ; Top of Stack
47         DCD     Reset_Handler         ; Reset Handler
48         DCD     NMI_Handler                 ; NMI Handler
49         DCD     HardFault_Handler           ; Hard Fault Handler
50         DCD     MemManage_Handler         ; MPU Fault Handler
51         DCD     BusFault_Handler          ; Bus Fault Handler
52         DCD     UsageFault_Handler        ; Usage Fault Handler
53 __vector_table_0x1c
54         DCD     0                           ; Reserved
55         DCD     0                           ; Reserved
56         DCD     0                           ; Reserved
57         DCD     0                           ; Reserved
58         DCD     SVC_Handler                 ; SVCall Handler
59         DCD     0                           ; Reserved
60         DCD     0                           ; Reserved
61         DCD     PendSV_Handler              ; PendSV Handler
62         DCD     SysTick_Handler             ; SysTick Handler
63
64
65 ; External Interrupts
66         DCD     WDT_IRQHandler            ; Watchdog timer
67         DCD     BOD_IRQHandler            ; Brown Out Detect
68         DCD     FLASH_IRQHandler          ; NVMC Flash Controller
69         DCD     EE_IRQHandler             ; NVMC EE Controller
70         DCD     DMA_IRQHandler            ; DMA Controller
71         DCD     GINT0_IRQHandler                         
72         DCD     GINT1_IRQHandler          ; PIO0 (0:7)   
73         DCD     PIN_INT0_IRQHandler       ; 16+ 7 Pin interrupt 0 or pattern match engine slice 0 interrupt
74         DCD     PIN_INT1_IRQHandler       ; 16+ 8 Pin interrupt 1 or pattern match engine slice 1 interrupt
75         DCD     PIN_INT2_IRQHandler       ; 16+ 9 Pin interrupt 2 or pattern match engine slice 2 interrupt
76         DCD     PIN_INT3_IRQHandler       ; 16+10 Pin interrupt 3 or pattern match engine slice 3 interrupt
77         DCD     PIN_INT4_IRQHandler       ; 16+11 Pin interrupt 4 or pattern match engine slice 4 interrupt
78         DCD     PIN_INT5_IRQHandler       ; 16+12 Pin interrupt 5 or pattern match engine slice 5 interrupt
79         DCD     PIN_INT6_IRQHandler       ; 16+13 Pin interrupt 6 or pattern match engine slice 6 interrupt
80         DCD     PIN_INT7_IRQHandler       ; 16+14 Pin interrupt 7 or pattern match engine slice 7 interrupt
81         DCD     RIT_IRQHandler            ; RIT Timer
82         DCD     SCT0_IRQHandler           ; SCT Timer0
83         DCD     SCT1_IRQHandler           ; SCT Timer1
84         DCD     SCT2_IRQHandler           ; SCT Timer2
85         DCD     SCT3_IRQHandler           ; SCT Timer3              
86         DCD     MRT_IRQHandler            ; MRT timer
87         DCD     UART0_IRQHandler          ; MIN UART0
88         DCD     UART1_IRQHandler          ; MIN UART1
89         DCD     UART2_IRQHandler          ; MIN UART2
90         DCD     I2C0_IRQHandler            ; BI2C
91         DCD     SPI0_IRQHandler           ; LSPI0 
92         DCD     SPI1_IRQHandler           ; LSPI1 
93         DCD     C_CAN0_IRQHandler            ; CAN 
94         DCD     USB_IRQ_IRQHandler            ; USB IRQ
95         DCD     USB_FIQ_IRQHandler            ; USB FIQ
96         DCD     USBWakeup_IRQHandler      ; USB wake up
97         DCD     ADC0_SEQA_IRQHandler      ; ADC0 SEQA
98         DCD     ADC0_SEQB_IRQHandler      ; ADC0 SEQB
99         DCD     ADC0_THCMP_IRQHandler     ; ADC0 THCMP
100         DCD     ADC0_OVR_IRQHandler       ; ADC0 OVR
101         DCD     ADC1_SEQA_IRQHandler      ; ADC1 SEQA
102         DCD     ADC1_SEQB_IRQHandler      ; ADC1 SEQB
103         DCD     ADC1_THCMP_IRQHandler     ; ADC1 THCMP
104         DCD     ADC1_OVR_IRQHandler       ; ADC1 OVR
105         DCD     DAC_IRQHandler            ; D/A Converter
106         DCD     CMP0_IRQHandler          ; Comparator 0
107         DCD     CMP1_IRQHandler          ; Comparator 1
108         DCD     CMP2_IRQHandler          ; Comparator 2
109         DCD     CMP3_IRQHandler          ; Comparator 3
110         DCD     QEI_IRQHandler            ; QEI 
111         DCD     RTC_ALARM_IRQHandler      ; RTC Alarm 
112         DCD     RTC_WAKE_IRQHandler       ; RTC Wake
113         
114 __Vectors_End
115
116 __Vectors       EQU   __vector_table
117 __Vectors_Size  EQU     __Vectors_End - __Vectors
118
119 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
120 ;;
121 ;; Default interrupt handlers.
122 ;;
123         THUMB
124         PUBWEAK Reset_Handler
125         SECTION .text:CODE:NOROOT:REORDER(2)
126 Reset_Handler
127         LDR     R0, =SystemInit
128         BLX     R0
129         LDR     R0, =__iar_program_start
130         BX      R0
131         
132         PUBWEAK NMI_Handler
133         PUBWEAK HardFault_Handler
134         PUBWEAK MemManage_Handler 
135         PUBWEAK BusFault_Handler  
136         PUBWEAK UsageFault_Handler        
137         PUBWEAK SVC_Handler
138         PUBWEAK DebugMon_Handler
139         PUBWEAK PendSV_Handler
140         PUBWEAK SysTick_Handler
141         PUBWEAK  WDT_IRQHandler            
142         PUBWEAK  BOD_IRQHandler            
143         PUBWEAK  FLASH_IRQHandler          
144         PUBWEAK  EE_IRQHandler             
145         PUBWEAK  DMA_IRQHandler            
146         PUBWEAK  GINT0_IRQHandler          
147         PUBWEAK  GINT1_IRQHandler          
148         PUBWEAK  PIN_INT0_IRQHandler       
149         PUBWEAK  PIN_INT1_IRQHandler       
150         PUBWEAK  PIN_INT2_IRQHandler       
151         PUBWEAK  PIN_INT3_IRQHandler       
152         PUBWEAK  PIN_INT4_IRQHandler       
153         PUBWEAK  PIN_INT5_IRQHandler       
154         PUBWEAK  PIN_INT6_IRQHandler      
155         PUBWEAK  PIN_INT7_IRQHandler       
156         PUBWEAK  RIT_IRQHandler            
157         PUBWEAK  SCT0_IRQHandler           
158         PUBWEAK  SCT1_IRQHandler           
159         PUBWEAK  SCT2_IRQHandler           
160         PUBWEAK  SCT3_IRQHandler           
161         PUBWEAK  MRT_IRQHandler            
162         PUBWEAK  UART0_IRQHandler          
163         PUBWEAK  UART1_IRQHandler          
164         PUBWEAK  UART2_IRQHandler          
165         PUBWEAK  I2C0_IRQHandler            
166         PUBWEAK  SPI0_IRQHandler           
167         PUBWEAK  SPI1_IRQHandler           
168         PUBWEAK  C_CAN0_IRQHandler            
169         PUBWEAK  USB_IRQ_IRQHandler            
170         PUBWEAK  USB_FIQ_IRQHandler            
171         PUBWEAK  USBWakeup_IRQHandler      
172         PUBWEAK  ADC0_SEQA_IRQHandler      
173         PUBWEAK  ADC0_SEQB_IRQHandler      
174         PUBWEAK  ADC0_THCMP_IRQHandler     
175         PUBWEAK  ADC0_OVR_IRQHandler       
176         PUBWEAK  ADC1_SEQA_IRQHandler      
177         PUBWEAK  ADC1_SEQB_IRQHandler      
178         PUBWEAK  ADC1_THCMP_IRQHandler     
179         PUBWEAK  ADC1_OVR_IRQHandler       
180         PUBWEAK  DAC_IRQHandler             
181         PUBWEAK  CMP0_IRQHandler           
182         PUBWEAK  CMP1_IRQHandler           
183         PUBWEAK  CMP2_IRQHandler           
184         PUBWEAK  CMP3_IRQHandler           
185         PUBWEAK  QEI_IRQHandler             
186         PUBWEAK  RTC_ALARM_IRQHandler       
187         PUBWEAK  RTC_WAKE_IRQHandler        
188
189       SECTION .text:CODE:REORDER:NOROOT(1)
190       THUMB
191
192 NMI_Handler
193 HardFault_Handler
194 MemManage_Handler
195 BusFault_Handler
196 UsageFault_Handler
197 SVC_Handler
198 DebugMon_Handler
199 PendSV_Handler
200 SysTick_Handler
201 WDT_IRQHandler
202 BOD_IRQHandler
203 FLASH_IRQHandler
204 EE_IRQHandler
205 DMA_IRQHandler
206 GINT0_IRQHandler
207 GINT1_IRQHandler
208 PIN_INT0_IRQHandler
209 PIN_INT1_IRQHandler
210 PIN_INT2_IRQHandler
211 PIN_INT3_IRQHandler
212 PIN_INT4_IRQHandler
213 PIN_INT5_IRQHandler
214 PIN_INT6_IRQHandler
215 PIN_INT7_IRQHandler
216 RIT_IRQHandler
217 SCT0_IRQHandler
218 SCT1_IRQHandler
219 SCT2_IRQHandler
220 SCT3_IRQHandler
221 MRT_IRQHandler
222 UART0_IRQHandler
223 UART1_IRQHandler
224 UART2_IRQHandler
225 I2C0_IRQHandler
226 SPI0_IRQHandler
227 SPI1_IRQHandler
228 C_CAN0_IRQHandler
229 USB_IRQ_IRQHandler
230 USB_FIQ_IRQHandler
231 USBWakeup_IRQHandler
232 ADC0_SEQA_IRQHandler
233 ADC0_SEQB_IRQHandler
234 ADC0_THCMP_IRQHandler
235 ADC0_OVR_IRQHandler
236 ADC1_SEQA_IRQHandler
237 ADC1_SEQB_IRQHandler
238 ADC1_THCMP_IRQHandler
239 ADC1_OVR_IRQHandler
240 DAC_IRQHandler
241 CMP0_IRQHandler
242 CMP1_IRQHandler
243 CMP2_IRQHandler
244 CMP3_IRQHandler
245 QEI_IRQHandler
246 RTC_ALARM_IRQHandler
247 RTC_WAKE_IRQHandler         
248 Default_Handler
249         B Default_Handler
250         
251         
252         SECTION .crp:CODE:ROOT(2)
253         DATA
254 /* Code Read Protection
255 CRP1    0x12345678 - Write to RAM command can not access RAM below 0x10000200.
256                    - Read Memory command: disabled.
257                    - Copy RAM to Flash command: cannot write to Sector 0.
258                    - "Go" command: disabled.
259                    - Erase sector(s) command: can erase any individual sector except 
260                          sector 0 only, or can erase all sectors at once.
261                    - Compare command: disabled
262 CRP2    0x87654321 - Write to RAM command: disabled.
263                    - Copy RAM to Flash: disabled.
264                    - Erase command: only allows erase of all sectors.
265 CRP3    0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
266                      by pulling PIO0_1 LOW is disabled if a valid user code is
267                      present in flash sector 0.
268 Caution: If CRP3 is selected, no future factory testing can be
269 performed on the device.
270 */
271         DCD     0xFFFFFFFF
272
273
274         END