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1 /*******************************************************************************
2  * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included
12  * in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
18  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Except as contained in this notice, the name of Maxim Integrated
23  * Products, Inc. shall not be used except as stated in the Maxim Integrated
24  * Products, Inc. Branding Policy.
25  *
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27  * of trade secrets, proprietary technology, copyrights, patents,
28  * trademarks, maskwork rights, or any other form of intellectual
29  * property whatsoever. Maxim Integrated Products, Inc. retains all
30  * ownership rights.
31  *******************************************************************************
32  */
33
34 #ifndef _MXC_DAC_REGS_H
35 #define _MXC_DAC_REGS_H
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 #include <stdint.h>
42
43 /**
44  * @file  dac_regs.h
45  * @addtogroup dac DAC
46  * @{
47  */
48
49 /**
50  * @brief Defines the DAC Operational Modes.
51  */
52 typedef enum {
53     /** DAC OpMode FIFO */
54     MXC_E_DAC_OP_MODE_FIFO = 0,
55     /** DAC OpMode Sample Count */
56     MXC_E_DAC_OP_MODE_DACSMPLCNT,
57     /** DAC OpMode DAC_REG Control */
58     MXC_E_DAC_OP_MODE_DAC_REG,
59     /** DAC OpMode Continuous */
60     MXC_E_DAC_OP_MODE_CONTINUOUS
61 } mxc_dac_op_mode_t;
62
63 /**
64  * @brief Defines the DAC Interpolation Options.
65  */
66 typedef enum {
67     /** DAC Interpolation is Disabled */
68     MXC_E_DAC_INTERP_MODE_DISABLED = 0,
69     /** DAC Interpolation 2:1 */
70     MXC_E_DAC_INTERP_MODE_2_TO_1,
71     /** DAC Interpolation 4:1 */
72     MXC_E_DAC_INTERP_MODE_4_TO_1,
73     /** DAC Interpolation 8:1 */
74     MXC_E_DAC_INTERP_MODE_8_TO_1
75 } mxc_dac_interp_mode_t;
76
77 /**
78  * @brief Defines the DAC Start Modes.
79  */
80 typedef enum {
81     /** Start on FIFO Not Empty */
82     MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY = 0,
83     /** Start on ADC generated Start Strobe */
84     MXC_E_DAC_START_MODE_ADC_STROBE,
85     /** Start on DAC generated Start Strobe */
86     MXC_E_DAC_START_MODE_DAC_STROBE
87 } mxc_dac_start_mode_t;
88
89 /*                                                  Offset   Register Description
90                                                     ======   ================================================== */
91 typedef struct {
92     __IO uint32_t ctrl0;                        /*  0x0000   DAC Control Register 0                             */
93     __IO uint32_t rate;                         /*  0x0004   DAC Output Rate Control                            */
94     __IO uint32_t ctrl1_int;                    /*  0x0008   DAC Control Register 1, Interrupt Flags and Enable */
95     __IO uint32_t reg;                          /*  0x000C   DAC Data Register                                  */
96     __IO uint32_t trm;                          /*  0x0010   DAC Trim Register */
97 } mxc_dac_regs_t;
98
99 /*                                                  Offset   Register Description
100                                                     ======   ================================================== */
101 typedef struct {
102     union {
103         __IO uint8_t output_8;                  /*  0x0000   Write to push values to DAC output FIFO            */
104         __IO uint16_t output_16;                /*  0x0000   Write to push values to DAC output FIFO            */
105     };
106 } mxc_dac_fifo_t;
107
108 /*
109    Register offsets for module DAC12.
110 */
111 #define MXC_R_DAC_OFFS_CTRL0                    ((uint32_t)0x00000000UL)
112 #define MXC_R_DAC_OFFS_RATE                     ((uint32_t)0x00000004UL)
113 #define MXC_R_DAC_OFFS_CTRL1_INT                ((uint32_t)0x00000008UL)
114 #define MXC_R_DAC_FIFO_OFFS_OUTPUT              ((uint32_t)0x00000000UL)
115
116 /*
117    Field positions and masks for module DAC.
118 */
119 #define MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS         0
120 #define MXC_F_DAC_CTRL0_FIFO_AE_CNT             ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS))
121 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS    5
122 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS))
123 #define MXC_F_DAC_CTRL0_FIFO_EMPTY_POS          6
124 #define MXC_F_DAC_CTRL0_FIFO_EMPTY              ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_EMPTY_POS))
125 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS   7
126 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY       ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS))
127 #define MXC_F_DAC_CTRL0_INTERP_MODE_POS         8
128 #define MXC_F_DAC_CTRL0_INTERP_MODE             ((uint32_t)(0x00000007UL << MXC_F_DAC_CTRL0_INTERP_MODE_POS))
129 #define MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS         12
130 #define MXC_F_DAC_CTRL0_FIFO_AF_CNT             ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS))
131 #define MXC_F_DAC_CTRL0_START_MODE_POS          16
132 #define MXC_F_DAC_CTRL0_START_MODE              ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_START_MODE_POS))
133 #define MXC_F_DAC_CTRL0_CPU_START_POS           20
134 #define MXC_F_DAC_CTRL0_CPU_START               ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CPU_START_POS))
135 #define MXC_F_DAC_CTRL0_OP_MODE_POS             24
136 #define MXC_F_DAC_CTRL0_OP_MODE                 ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_OP_MODE_POS))
137 #define MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS      26
138 #define MXC_F_DAC_CTRL0_POWER_MODE_1_0          ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS))
139 #define MXC_F_DAC_CTRL0_POWER_ON_POS            28
140 #define MXC_F_DAC_CTRL0_POWER_ON                ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_ON_POS))
141 #define MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS       29
142 #define MXC_F_DAC_CTRL0_CLOCK_GATE_EN           ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS))
143 #define MXC_F_DAC_CTRL0_POWER_MODE_2_POS        30
144 #define MXC_F_DAC_CTRL0_POWER_MODE_2            ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_MODE_2_POS))
145 #define MXC_F_DAC_CTRL0_RESET_POS               31
146 #define MXC_F_DAC_CTRL0_RESET                   ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_RESET_POS))
147
148 #define MXC_F_DAC_RATE_RATE_CNT_POS             0
149 #define MXC_F_DAC_RATE_RATE_CNT                 ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_RATE_CNT_POS))
150 #define MXC_F_DAC_RATE_SAMPLE_CNT_POS           16
151 #define MXC_F_DAC_RATE_SAMPLE_CNT               ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_SAMPLE_CNT_POS))
152
153 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS     0
154 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF         ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS))
155 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS    1
156 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS))
157 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS 2
158 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF     ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS))
159 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS       3
160 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW           ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS))
161 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS     16
162 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE         ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS))
163 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS    17
164 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS))
165 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS 18
166 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE     ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS))
167 #define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS  28
168 #define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE      ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS))
169 #define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS  29
170 #define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE      ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS))
171
172 #ifdef __cplusplus
173 }
174 #endif
175
176 /**
177 * @}
178 */
179
180 #endif /* _DAC12_REGS_H */