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[qmk_firmware.git] / protocol / usb_hid / USB_Host_Shield_2.0 / cdcprolific.h
1 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
2
3 This software may be distributed and modified under the terms of the GNU
4 General Public License version 2 (GPL2) as published by the Free Software
5 Foundation and appearing in the file GPL2.TXT included in the packaging of
6 this file. Please note that GPL2 Section 2[b] requires that all works based
7 on this software must also be made publicly available under the terms of
8 the GPL2 ("Copyleft").
9
10 Contact information
11 -------------------
12
13 Circuits At Home, LTD
14 Web      :  http://www.circuitsathome.com
15 e-mail   :  support@circuitsathome.com
16  */
17 #if !defined(__CDCPROLIFIC_H__)
18 #define __CDCPROLIFIC_H__
19
20 #include "cdcacm.h"
21
22 //#define PL2303_COMPAT // Uncomment it if you have compatibility problems
23
24 #define PL_VID                                  0x067B
25 #define CHECK_PID(pid)                          ( pid != 0x2303 && pid != 0x0609 )
26
27 //#define PL_PID                                0x0609
28
29 #define PROLIFIC_REV_H                          0x0202
30 #define PROLIFIC_REV_X                          0x0300
31 #define PROLIFIC_REV_HX_CHIP_D                  0x0400
32 #define PROLIFIC_REV_1                          0x0001
33
34 #define kXOnChar                                '\x11'
35 #define kXOffChar                               '\x13'
36
37 #define SPECIAL_SHIFT                           (5)
38 #define SPECIAL_MASK                            ((1<<SPECIAL_SHIFT) - 1)
39 #define STATE_ALL                               ( PD_RS232_S_MASK | PD_S_MASK )
40 #define FLOW_RX_AUTO                            ( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO )
41 #define FLOW_TX_AUTO                            ( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD )
42 #define CAN_BE_AUTO                             ( FLOW_RX_AUTO | FLOW_TX_AUTO )
43 #define CAN_NOTIFY                              ( PD_RS232_N_MASK )
44 #define EXTERNAL_MASK                           ( PD_S_MASK | (PD_RS232_S_MASK & ~PD_RS232_S_LOOP) )
45 #define INTERNAL_DELAY                          ( PD_RS232_S_LOOP )
46 #define DEFAULT_AUTO                            ( PD_RS232_A_DTR | PD_RS232_A_RFR | PD_RS232_A_CTS | PD_RS232_A_DSR )
47 #define DEFAULT_NOTIFY                          0x00
48 #define DEFAULT_STATE                           ( PD_S_TX_ENABLE | PD_S_RX_ENABLE | PD_RS232_A_TXO | PD_RS232_A_RXO )
49
50 #define CONTINUE_SEND                           1
51 #define PAUSE_SEND                              2
52
53 #define kRxAutoFlow                             ((UInt32)( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO ))
54 #define kTxAutoFlow                             ((UInt32)( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD ))
55 #define kControl_StateMask                      ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI  ))
56 #define kRxQueueState                           ((UInt32)( PD_S_RXQ_EMPTY | PD_S_RXQ_LOW_WATER | PD_S_RXQ_HIGH_WATER | PD_S_RXQ_FULL ))
57 #define kTxQueueState                           ((UInt32)( PD_S_TXQ_EMPTY | PD_S_TXQ_LOW_WATER | PD_S_TXQ_HIGH_WATER | PD_S_TXQ_FULL ))
58
59 #define kCONTROL_DTR                            0x01
60 #define kCONTROL_RTS                            0x02
61
62 #define kStateTransientMask                     0x74
63 #define kBreakError                             0x04
64 #define kFrameError                             0x10
65 #define kParityError                            0x20
66 #define kOverrunError                           0x40
67
68 #define kCTS                                    0x80
69 #define kDSR                                    0x02
70 #define kRI                                     0x08
71 #define kDCD                                    0x01
72 #define kHandshakeInMask                        ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI  ))
73
74 #define VENDOR_WRITE_REQUEST_TYPE               0x40
75 #define VENDOR_WRITE_REQUEST                    0x01
76
77 #define VENDOR_READ_REQUEST_TYPE                0xc0
78 #define VENDOR_READ_REQUEST                     0x01
79
80 // Device Configuration Registers (DCR0, DCR1, DCR2)
81 #define SET_DCR0                                0x00
82 #define GET_DCR0                                0x80
83 #define DCR0_INIT                               0x01
84 #define DCR0_INIT_H                             0x41
85 #define DCR0_INIT_X                             0x61
86
87 #define SET_DCR1                                0x01
88 #define GET_DCR1                                0x81
89 #define DCR1_INIT_H                             0x80
90 #define DCR1_INIT_X                             0x00
91
92 #define SET_DCR2                                0x02
93 #define GET_DCR2                                0x82
94 #define DCR2_INIT_H                             0x24
95 #define DCR2_INIT_X                             0x44
96
97 // On-chip Data Buffers:
98 #define RESET_DOWNSTREAM_DATA_PIPE              0x08
99 #define RESET_UPSTREAM_DATA_PIPE                0x09
100
101
102 #define PL_MAX_ENDPOINTS                        4
103
104 enum tXO_State {
105         kXOnSent = -2,
106         kXOffSent = -1,
107         kXO_Idle = 0,
108         kXOffNeeded = 1,
109         kXOnNeeded = 2
110 };
111
112 enum pl2303_type {
113         unknown,
114         type_0, /* don't know the difference between type 0 and */
115         type_1, /* type 1, until someone from prolific tells us... */
116         rev_X,
117         rev_HX, /* HX version of the pl2303 chip */
118         rev_H
119 };
120
121
122 class PL2303 : public ACM {
123         uint16_t wPLType; // Type of chip
124
125 public:
126         PL2303(USB *pusb, CDCAsyncOper *pasync);
127
128         // USBDeviceConfig implementation
129         uint8_t Init(uint8_t parent, uint8_t port, bool lowspeed);
130         //virtual uint8_t Release();
131         //virtual uint8_t Poll();
132         //virtual uint8_t GetAddress() { return bAddress; };
133
134         //// UsbConfigXtracter implementation
135         //virtual void EndpointXtract(uint8_t conf, uint8_t iface, uint8_t alt, uint8_t proto, const USB_ENDPOINT_DESCRIPTOR *ep);
136
137 #ifdef PL2303_COMPAT
138 private:
139         /* Prolific proprietary requests */
140         uint8_t vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf );
141         uint8_t vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index );
142 #endif
143 };
144
145 #ifdef PL2303_COMPAT
146 /* vendor read request */
147 inline uint8_t PL2303::vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf )
148 {
149         return( pUsb->ctrlReq(bAddress, 0, VENDOR_READ_REQUEST_TYPE, VENDOR_READ_REQUEST, val_lo, val_hi, index, 1, 1, buf, NULL ));
150 }
151
152 /* vendor write request */
153 inline uint8_t PL2303::vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index )
154 {
155         return( pUsb->ctrlReq(bAddress, 0, VENDOR_WRITE_REQUEST_TYPE, VENDOR_WRITE_REQUEST, val_lo, val_hi, index, 0, 0, NULL, NULL ));
156 }
157 #endif
158
159 #endif // __CDCPROLIFIC_H__