1 /* Copyright (C) 2014-2015 by Jacob Alexander
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 // ----- Includes -----
25 #include <string.h> // For memcpy
28 #include <Lib/OutputLib.h>
29 #include <Lib/Interrupts.h>
32 #include "uart_serial.h"
36 // ----- Defines -----
39 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
40 #define UART_BDH UART0_BDH
41 #define UART_BDL UART0_BDL
42 #define UART_C1 UART0_C1
43 #define UART_C2 UART0_C2
44 #define UART_C3 UART0_C3
45 #define UART_C4 UART0_C4
46 #define UART_CFIFO UART0_CFIFO
47 #define UART_D UART0_D
48 #define UART_PFIFO UART0_PFIFO
49 #define UART_RCFIFO UART0_RCFIFO
50 #define UART_RWFIFO UART0_RWFIFO
51 #define UART_S1 UART0_S1
52 #define UART_S2 UART0_S2
53 #define UART_SFIFO UART0_SFIFO
54 #define UART_TWFIFO UART0_TWFIFO
56 #define SIM_SCGC4_UART SIM_SCGC4_UART0
57 #define IRQ_UART_STATUS IRQ_UART0_STATUS
59 #elif defined(_mk20dx256vlh7_) // UART2 Debug
60 #define UART_BDH UART2_BDH
61 #define UART_BDL UART2_BDL
62 #define UART_C1 UART2_C1
63 #define UART_C2 UART2_C2
64 #define UART_C3 UART2_C3
65 #define UART_C4 UART2_C4
66 #define UART_CFIFO UART2_CFIFO
67 #define UART_D UART2_D
68 #define UART_PFIFO UART2_PFIFO
69 #define UART_RCFIFO UART2_RCFIFO
70 #define UART_RWFIFO UART2_RWFIFO
71 #define UART_S1 UART2_S1
72 #define UART_S2 UART2_S2
73 #define UART_SFIFO UART2_SFIFO
74 #define UART_TWFIFO UART2_TWFIFO
76 #define SIM_SCGC4_UART SIM_SCGC4_UART2
77 #define IRQ_UART_STATUS IRQ_UART2_STATUS
83 // ----- Variables -----
85 #define uart_buffer_size 128 // 128 byte buffer
86 volatile uint8_t uart_buffer_head = 0;
87 volatile uint8_t uart_buffer_tail = 0;
88 volatile uint8_t uart_buffer_items = 0;
89 volatile uint8_t uart_buffer[uart_buffer_size];
91 volatile uint8_t uart_configured = 0;
95 // ----- Interrupt Functions -----
97 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
98 void uart0_status_isr()
99 #elif defined(_mk20dx256vlh7_) // UART2 Debug
100 void uart2_status_isr()
103 cli(); // Disable Interrupts
105 // UART0_S1 must be read for the interrupt to be cleared
106 if ( UART_S1 & ( UART_S1_RDRF | UART_S1_IDLE ) )
108 uint8_t available = UART_RCFIFO;
110 // If there was actually nothing
111 if ( available == 0 )
115 UART_CFIFO = UART_CFIFO_RXFLUSH;
119 // Read UART0 into buffer until FIFO is empty
120 while ( available-- > 0 )
122 uart_buffer[uart_buffer_tail++] = UART_D;
125 // Wrap-around of tail pointer
126 if ( uart_buffer_tail >= uart_buffer_size )
128 uart_buffer_tail = 0;
131 // Make sure the head pointer also moves if circular buffer is overwritten
132 if ( uart_buffer_head == uart_buffer_tail )
137 // Wrap-around of head pointer
138 if ( uart_buffer_head >= uart_buffer_size )
140 uart_buffer_head = 0;
146 sei(); // Re-enable Interrupts
151 // ----- Functions -----
153 void uart_serial_setup()
155 // Indication that the UART is not ready yet
158 // Setup the the UART interface for keyboard data input
159 SIM_SCGC4 |= SIM_SCGC4_UART; // Disable clock gating
161 // MCHCK / Kiibohd-dfu
162 #if defined(_mk20dx128vlf5_)
163 // Pin Setup for UART0
164 PORTA_PCR1 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); // RX Pin
165 PORTA_PCR2 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); // TX Pin
168 #elif defined(_mk20dx256vlh7_)
169 // Pin Setup for UART2
170 PORTD_PCR2 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); // RX Pin
171 PORTD_PCR3 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
175 // Pin Setup for UART0
176 PORTB_PCR16 = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); // RX Pin
177 PORTB_PCR17 = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); // TX Pin
181 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
182 // Setup baud rate - 115200 Baud
183 // 48 MHz / ( 16 * Baud ) = BDH/L
184 // Baud: 115200 -> 48 MHz / ( 16 * 115200 ) = 26.0416667
185 // Thus baud setting = 26
186 // NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
187 uint16_t baud = 26; // Max setting of 8191
188 UART_BDH = (uint8_t)(baud >> 8);
189 UART_BDL = (uint8_t)baud;
192 #elif defined(_mk20dx256vlh7_) // UART2 Debug
193 // Setup baud rate - 115200 Baud
195 // 36 MHz / ( 16 * Baud ) = BDH/L
196 // Baud: 115200 -> 36 MHz / ( 16 * 115200 ) = 19.53125
197 // Thus baud setting = 19
198 // NOTE: If finer baud adjustment is needed see UARTx_C4 -> BRFA in the datasheet
199 uint16_t baud = 19; // Max setting of 8191
200 UART_BDH = (uint8_t)(baud >> 8);
201 UART_BDL = (uint8_t)baud;
206 // 8 bit, No Parity, Idle Character bit after stop
207 UART_C1 = UART_C1_ILT;
209 // Interrupt notification watermarks
210 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_) || defined(_mk20dx256_) // UART0 Debug
213 #elif defined(_mk20dx256vlh7_) // UART2 Debug
214 // UART2 has a single byte FIFO
219 // TX FIFO Enabled, TX FIFO Size 1 (Max 8 datawords), RX FIFO Enabled, RX FIFO Size 1 (Max 8 datawords)
224 UART_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
226 // Reciever Inversion Disabled, LSBF
227 // UART_S2_RXINV UART_S2_MSBF
230 // Transmit Inversion Disabled
234 // TX Enabled, RX Enabled, RX Interrupt Enabled, Generate idles
235 // UART_C2_TE UART_C2_RE UART_C2_RIE UART_C2_ILIE
236 UART_C2 = UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE;
238 // Add interrupt to the vector table
239 NVIC_ENABLE_IRQ( IRQ_UART_STATUS );
241 // UART is now ready to use
246 // Get the next character, or -1 if nothing received
247 int uart_serial_getchar()
249 if ( !uart_configured )
252 unsigned int value = -1;
254 // Check to see if the FIFO has characters
255 if ( uart_buffer_items > 0 )
257 value = uart_buffer[uart_buffer_head++];
260 // Wrap-around of head pointer
261 if ( uart_buffer_head >= uart_buffer_size )
263 uart_buffer_head = 0;
271 // Number of bytes available in the receive buffer
272 int uart_serial_available()
274 return uart_buffer_items;
278 // Discard any buffered input
279 void uart_serial_flush_input()
281 uart_buffer_head = 0;
282 uart_buffer_tail = 0;
283 uart_buffer_items = 0;
287 // Transmit a character. 0 returned on success, -1 on error
288 int uart_serial_putchar( uint8_t c )
290 if ( !uart_configured )
293 while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
300 int uart_serial_write( const void *buffer, uint32_t size )
302 if ( !uart_configured )
305 const uint8_t *data = (const uint8_t *)buffer;
306 uint32_t position = 0;
308 // While buffer is not empty and transmit buffer is
309 while ( position < size )
311 while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
312 UART_D = data[position++];
319 void uart_serial_flush_output()
321 // Delay until buffer has been sent
322 while ( !( UART_SFIFO & UART_SFIFO_TXEMPT ) ); // Wait till there is room to send
326 void uart_device_reload()
328 asm volatile("bkpt");