Lib/mk20dx.c

   1 /* Teensyduino Core Library
   2  * http://www.pjrc.com/teensy/
   3  * Copyright (c) 2013 PJRC.COM, LLC.
   4  * Modifications by Jacob Alexander 2014
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * 1. The above copyright notice and this permission notice shall be
  15  * included in all copies or substantial portions of the Software.
  16  *
  17  * 2. If the Software is incorporated into a build system that allows
  18  * selection among a list of target devices, then similar target
  19  * devices manufactured by PJRC.COM must be included in the list of
  20  * target devices and selectable in the same manner.
  21  *
  22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  23  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  24  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  25  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  26  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  27  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  28  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  29  * SOFTWARE.
  30  */
  31
  32 #include "mk20dx.h"
  33
  34
  35 extern unsigned long _stext;
  36 extern unsigned long _etext;
  37 extern unsigned long _sdata;
  38 extern unsigned long _edata;
  39 extern unsigned long _sbss;
  40 extern unsigned long _ebss;
  41 extern unsigned long _estack;
  42 //extern void __init_array_start(void);
  43 //extern void __init_array_end(void);
  44 extern int main (void);
  45 void ResetHandler(void);
  46 void _init_Teensyduino_internal_(void);
  47 void __libc_init_array(void);
  48
  49
  50 void fault_isr(void)
  51 {
  52         while (1) {
  53                 // keep polling some communication while in fault
  54                 // mode, so we don't completely die.
  55                 if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr();
  56                 if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr();
  57                 if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr();
  58                 if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr();
  59         }
  60 }
  61
  62 void unused_isr(void)
  63 {
  64         fault_isr();
  65 }
  66
  67 extern volatile uint32_t systick_millis_count;
  68 void systick_default_isr(void)
  69 {
  70         systick_millis_count++;
  71 }
  72
  73 void nmi_isr(void)              __attribute__ ((weak, alias("unused_isr")));
  74 void hard_fault_isr(void)       __attribute__ ((weak, alias("unused_isr")));
  75 void memmanage_fault_isr(void)  __attribute__ ((weak, alias("unused_isr")));
  76 void bus_fault_isr(void)        __attribute__ ((weak, alias("unused_isr")));
  77 void usage_fault_isr(void)      __attribute__ ((weak, alias("unused_isr")));
  78 void svcall_isr(void)           __attribute__ ((weak, alias("unused_isr")));
  79 void debugmonitor_isr(void)     __attribute__ ((weak, alias("unused_isr")));
  80 void pendablesrvreq_isr(void)   __attribute__ ((weak, alias("unused_isr")));
  81 void systick_isr(void)          __attribute__ ((weak, alias("systick_default_isr")));
  82
  83 void dma_ch0_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  84 void dma_ch1_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  85 void dma_ch2_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  86 void dma_ch3_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  87 void dma_ch4_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  88 void dma_ch5_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  89 void dma_ch6_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  90 void dma_ch7_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  91 void dma_ch8_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  92 void dma_ch9_isr(void)          __attribute__ ((weak, alias("unused_isr")));
  93 void dma_ch10_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  94 void dma_ch11_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  95 void dma_ch12_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  96 void dma_ch13_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  97 void dma_ch14_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  98 void dma_ch15_isr(void)         __attribute__ ((weak, alias("unused_isr")));
  99 void dma_error_isr(void)        __attribute__ ((weak, alias("unused_isr")));
 100 void mcm_isr(void)              __attribute__ ((weak, alias("unused_isr")));
 101 void flash_cmd_isr(void)        __attribute__ ((weak, alias("unused_isr")));
 102 void flash_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 103 void low_voltage_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 104 void wakeup_isr(void)           __attribute__ ((weak, alias("unused_isr")));
 105 void watchdog_isr(void)         __attribute__ ((weak, alias("unused_isr")));
 106 void i2c0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 107 void i2c1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 108 void i2c2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 109 void spi0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 110 void spi1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 111 void spi2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 112 void sdhc_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 113 void can0_message_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 114 void can0_bus_off_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 115 void can0_error_isr(void)       __attribute__ ((weak, alias("unused_isr")));
 116 void can0_tx_warn_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 117 void can0_rx_warn_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 118 void can0_wakeup_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 119 void i2s0_tx_isr(void)          __attribute__ ((weak, alias("unused_isr")));
 120 void i2s0_rx_isr(void)          __attribute__ ((weak, alias("unused_isr")));
 121 void uart0_lon_isr(void)        __attribute__ ((weak, alias("unused_isr")));
 122 void uart0_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 123 void uart0_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 124 void uart1_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 125 void uart1_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 126 void uart2_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 127 void uart2_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 128 void uart3_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 129 void uart3_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 130 void uart4_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 131 void uart4_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 132 void uart5_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
 133 void uart5_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 134 void adc0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 135 void adc1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 136 void cmp0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 137 void cmp1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 138 void cmp2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 139 void ftm0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 140 void ftm1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 141 void ftm2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 142 void ftm3_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 143 void cmt_isr(void)              __attribute__ ((weak, alias("unused_isr")));
 144 void rtc_alarm_isr(void)        __attribute__ ((weak, alias("unused_isr")));
 145 void rtc_seconds_isr(void)      __attribute__ ((weak, alias("unused_isr")));
 146 void pit0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 147 void pit1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 148 void pit2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 149 void pit3_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 150 void pdb_isr(void)              __attribute__ ((weak, alias("unused_isr")));
 151 void usb_isr(void)              __attribute__ ((weak, alias("unused_isr")));
 152 void usb_charge_isr(void)       __attribute__ ((weak, alias("unused_isr")));
 153 void dac0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 154 void dac1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 155 void tsi0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
 156 void mcg_isr(void)              __attribute__ ((weak, alias("unused_isr")));
 157 void lptmr_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 158 void porta_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 159 void portb_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 160 void portc_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 161 void portd_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 162 void porte_isr(void)            __attribute__ ((weak, alias("unused_isr")));
 163 void software_isr(void)         __attribute__ ((weak, alias("unused_isr")));
 164
 165
 166 // TODO: create AVR-stype ISR() macro, with default linkage to undefined handler
 167 //
 168 __attribute__ ((section(".vectors"), used))
 169 void (* const gVectors[])(void) =
 170 {
 171         (void (*)(void))((unsigned long)&_estack),      //  0 ARM: Initial Stack Pointer
 172         ResetHandler,                                   //  1 ARM: Initial Program Counter
 173         nmi_isr,                                        //  2 ARM: Non-maskable Interrupt (NMI)
 174         hard_fault_isr,                                 //  3 ARM: Hard Fault
 175         memmanage_fault_isr,                            //  4 ARM: MemManage Fault
 176         bus_fault_isr,                                  //  5 ARM: Bus Fault
 177         usage_fault_isr,                                //  6 ARM: Usage Fault
 178         fault_isr,                                      //  7 --
 179         fault_isr,                                      //  8 --
 180         fault_isr,                                      //  9 --
 181         fault_isr,                                      // 10 --
 182         svcall_isr,                                     // 11 ARM: Supervisor call (SVCall)
 183         debugmonitor_isr,                               // 12 ARM: Debug Monitor
 184         fault_isr,                                      // 13 --
 185         pendablesrvreq_isr,                             // 14 ARM: Pendable req serv(PendableSrvReq)
 186         systick_isr,                                    // 15 ARM: System tick timer (SysTick)
 187 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_)
 188         dma_ch0_isr,                                    // 16 DMA channel 0 transfer complete
 189         dma_ch1_isr,                                    // 17 DMA channel 1 transfer complete
 190         dma_ch2_isr,                                    // 18 DMA channel 2 transfer complete
 191         dma_ch3_isr,                                    // 19 DMA channel 3 transfer complete
 192         dma_error_isr,                                  // 20 DMA error interrupt channel
 193         unused_isr,                                     // 21 DMA --
 194         flash_cmd_isr,                                  // 22 Flash Memory Command complete
 195         flash_error_isr,                                // 23 Flash Read collision
 196         low_voltage_isr,                                // 24 Low-voltage detect/warning
 197         wakeup_isr,                                     // 25 Low Leakage Wakeup
 198         watchdog_isr,                                   // 26 Both EWM and WDOG interrupt
 199         i2c0_isr,                                       // 27 I2C0
 200         spi0_isr,                                       // 28 SPI0
 201         i2s0_tx_isr,                                    // 29 I2S0 Transmit
 202         i2s0_rx_isr,                                    // 30 I2S0 Receive
 203         uart0_lon_isr,                                  // 31 UART0 CEA709.1-B (LON) status
 204         uart0_status_isr,                               // 32 UART0 status
 205         uart0_error_isr,                                // 33 UART0 error
 206         uart1_status_isr,                               // 34 UART1 status
 207         uart1_error_isr,                                // 35 UART1 error
 208         uart2_status_isr,                               // 36 UART2 status
 209         uart2_error_isr,                                // 37 UART2 error
 210         adc0_isr,                                       // 38 ADC0
 211         cmp0_isr,                                       // 39 CMP0
 212         cmp1_isr,                                       // 40 CMP1
 213         ftm0_isr,                                       // 41 FTM0
 214         ftm1_isr,                                       // 42 FTM1
 215         cmt_isr,                                        // 43 CMT
 216         rtc_alarm_isr,                                  // 44 RTC Alarm interrupt
 217         rtc_seconds_isr,                                // 45 RTC Seconds interrupt
 218         pit0_isr,                                       // 46 PIT Channel 0
 219         pit1_isr,                                       // 47 PIT Channel 1
 220         pit2_isr,                                       // 48 PIT Channel 2
 221         pit3_isr,                                       // 49 PIT Channel 3
 222         pdb_isr,                                        // 50 PDB Programmable Delay Block
 223         usb_isr,                                        // 51 USB OTG
 224         usb_charge_isr,                                 // 52 USB Charger Detect
 225         tsi0_isr,                                       // 53 TSI0
 226         mcg_isr,                                        // 54 MCG
 227         lptmr_isr,                                      // 55 Low Power Timer
 228         porta_isr,                                      // 56 Pin detect (Port A)
 229         portb_isr,                                      // 57 Pin detect (Port B)
 230         portc_isr,                                      // 58 Pin detect (Port C)
 231         portd_isr,                                      // 59 Pin detect (Port D)
 232         porte_isr,                                      // 60 Pin detect (Port E)
 233         software_isr,                                   // 61 Software interrupt
 234 #elif defined(_mk20dx256_)
 235         dma_ch0_isr,                                    // 16 DMA channel 0 transfer complete
 236         dma_ch1_isr,                                    // 17 DMA channel 1 transfer complete
 237         dma_ch2_isr,                                    // 18 DMA channel 2 transfer complete
 238         dma_ch3_isr,                                    // 19 DMA channel 3 transfer complete
 239         dma_ch4_isr,                                    // 20 DMA channel 4 transfer complete
 240         dma_ch5_isr,                                    // 21 DMA channel 5 transfer complete
 241         dma_ch6_isr,                                    // 22 DMA channel 6 transfer complete
 242         dma_ch7_isr,                                    // 23 DMA channel 7 transfer complete
 243         dma_ch8_isr,                                    // 24 DMA channel 8 transfer complete
 244         dma_ch9_isr,                                    // 25 DMA channel 9 transfer complete
 245         dma_ch10_isr,                                   // 26 DMA channel 10 transfer complete
 246         dma_ch11_isr,                                   // 27 DMA channel 10 transfer complete
 247         dma_ch12_isr,                                   // 28 DMA channel 10 transfer complete
 248         dma_ch13_isr,                                   // 29 DMA channel 10 transfer complete
 249         dma_ch14_isr,                                   // 30 DMA channel 10 transfer complete
 250         dma_ch15_isr,                                   // 31 DMA channel 10 transfer complete
 251         dma_error_isr,                                  // 32 DMA error interrupt channel
 252         unused_isr,                                     // 33 --
 253         flash_cmd_isr,                                  // 34 Flash Memory Command complete
 254         flash_error_isr,                                // 35 Flash Read collision
 255         low_voltage_isr,                                // 36 Low-voltage detect/warning
 256         wakeup_isr,                                     // 37 Low Leakage Wakeup
 257         watchdog_isr,                                   // 38 Both EWM and WDOG interrupt
 258         unused_isr,                                     // 39 --
 259         i2c0_isr,                                       // 40 I2C0
 260         i2c1_isr,                                       // 41 I2C1
 261         spi0_isr,                                       // 42 SPI0
 262         spi1_isr,                                       // 43 SPI1
 263         unused_isr,                                     // 44 --
 264         can0_message_isr,                               // 45 CAN OR'ed Message buffer (0-15)
 265         can0_bus_off_isr,                               // 46 CAN Bus Off
 266         can0_error_isr,                                 // 47 CAN Error
 267         can0_tx_warn_isr,                               // 48 CAN Transmit Warning
 268         can0_rx_warn_isr,                               // 49 CAN Receive Warning
 269         can0_wakeup_isr,                                // 50 CAN Wake Up
 270         i2s0_tx_isr,                                    // 51 I2S0 Transmit
 271         i2s0_rx_isr,                                    // 52 I2S0 Receive
 272         unused_isr,                                     // 53 --
 273         unused_isr,                                     // 54 --
 274         unused_isr,                                     // 55 --
 275         unused_isr,                                     // 56 --
 276         unused_isr,                                     // 57 --
 277         unused_isr,                                     // 58 --
 278         unused_isr,                                     // 59 --
 279         uart0_lon_isr,                                  // 60 UART0 CEA709.1-B (LON) status
 280         uart0_status_isr,                               // 61 UART0 status
 281         uart0_error_isr,                                // 62 UART0 error
 282         uart1_status_isr,                               // 63 UART1 status
 283         uart1_error_isr,                                // 64 UART1 error
 284         uart2_status_isr,                               // 65 UART2 status
 285         uart2_error_isr,                                // 66 UART2 error
 286         unused_isr,                                     // 67 --
 287         unused_isr,                                     // 68 --
 288         unused_isr,                                     // 69 --
 289         unused_isr,                                     // 70 --
 290         unused_isr,                                     // 71 --
 291         unused_isr,                                     // 72 --
 292         adc0_isr,                                       // 73 ADC0
 293         adc1_isr,                                       // 74 ADC1
 294         cmp0_isr,                                       // 75 CMP0
 295         cmp1_isr,                                       // 76 CMP1
 296         cmp2_isr,                                       // 77 CMP2
 297         ftm0_isr,                                       // 78 FTM0
 298         ftm1_isr,                                       // 79 FTM1
 299         ftm2_isr,                                       // 80 FTM2
 300         cmt_isr,                                        // 81 CMT
 301         rtc_alarm_isr,                                  // 82 RTC Alarm interrupt
 302         rtc_seconds_isr,                                // 83 RTC Seconds interrupt
 303         pit0_isr,                                       // 84 PIT Channel 0
 304         pit1_isr,                                       // 85 PIT Channel 1
 305         pit2_isr,                                       // 86 PIT Channel 2
 306         pit3_isr,                                       // 87 PIT Channel 3
 307         pdb_isr,                                        // 88 PDB Programmable Delay Block
 308         usb_isr,                                        // 89 USB OTG
 309         usb_charge_isr,                                 // 90 USB Charger Detect
 310         unused_isr,                                     // 91 --
 311         unused_isr,                                     // 92 --
 312         unused_isr,                                     // 93 --
 313         unused_isr,                                     // 94 --
 314         unused_isr,                                     // 95 --
 315         unused_isr,                                     // 96 --
 316         dac0_isr,                                       // 97 DAC0
 317         unused_isr,                                     // 98 --
 318         tsi0_isr,                                       // 99 TSI0
 319         mcg_isr,                                        // 100 MCG
 320         lptmr_isr,                                      // 101 Low Power Timer
 321         unused_isr,                                     // 102 --
 322         porta_isr,                                      // 103 Pin detect (Port A)
 323         portb_isr,                                      // 104 Pin detect (Port B)
 324         portc_isr,                                      // 105 Pin detect (Port C)
 325         portd_isr,                                      // 106 Pin detect (Port D)
 326         porte_isr,                                      // 107 Pin detect (Port E)
 327         unused_isr,                                     // 108 --
 328         unused_isr,                                     // 109 --
 329         software_isr,                                   // 110 Software interrupt
 330 #endif
 331 };
 332
 333 //void usb_isr(void)
 334 //{
 335 //}
 336
 337 __attribute__ ((section(".flashconfig"), used))
 338 const uint8_t flashconfigbytes[16] = {
 339         0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
 340         0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF
 341 };
 342
 343
 344 // Automatically initialize the RTC.  When the build defines the compile
 345 // time, and the user has added a crystal, the RTC will automatically
 346 // begin at the time of the first upload.
 347 #ifndef TIME_T
 348 #define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this)
 349 #endif
 350 extern void rtc_set(unsigned long t);
 351
 352
 353
 354 static void startup_unused_hook(void) {}
 355 void startup_early_hook(void)           __attribute__ ((weak, alias("startup_unused_hook")));
 356 void startup_late_hook(void)            __attribute__ ((weak, alias("startup_unused_hook")));
 357
 358
 359 __attribute__ ((section(".startup")))
 360 void ResetHandler(void)
 361 {
 362 #if defined(_mk20dx128vlf5_)
 363         /* Disable Watchdog */
 364         WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
 365         WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
 366         WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;
 367
 368         /* FLL at 48MHz */
 369         MCG_C4 = MCG_C4_DMX32 | MCG_C4_DRST_DRS(1);
 370         /*
 371         MCG.c4.raw = ((struct MCG_C4_t){
 372                         .drst_drs = MCG_DRST_DRS_MID,
 373                         .dmx32 = 1
 374                 }).raw;
 375         */
 376         SIM_SOPT2 = SIM_SOPT2_PLLFLLSEL;
 377
 378         // release I/O pins hold, if we woke up from VLLS mode
 379         if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;
 380
 381         uint32_t *src = &_etext;
 382         uint32_t *dest = &_sdata;
 383         unsigned int i;
 384
 385         while (dest < &_edata) *dest++ = *src++;
 386         dest = &_sbss;
 387         while (dest < &_ebss) *dest++ = 0;
 388         SCB_VTOR = 0;   // use vector table in flash
 389
 390         // default all interrupts to medium priority level
 391         for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
 392
 393         __enable_irq();
 394         __libc_init_array();
 395
 396         //memcpy(&_sdata, &_sidata, (uintptr_t)&_edata - (uintptr_t)&_sdata);
 397         //memset(&_sbss, 0, (uintptr_t)&_ebss - (uintptr_t)&_sbss);
 398 #else
 399         uint32_t *src = &_etext;
 400         uint32_t *dest = &_sdata;
 401         unsigned int i;
 402
 403         WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
 404         WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
 405         WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;
 406         startup_early_hook();
 407
 408         // enable clocks to always-used peripherals
 409 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_)
 410         SIM_SCGC5 = 0x00043F82;         // clocks active to all GPIO
 411         SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
 412 #elif defined(_mk20dx256_)
 413         SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2;
 414         SIM_SCGC5 = 0x00043F82;         // clocks active to all GPIO
 415         SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
 416 #endif
 417
 418         // if the RTC oscillator isn't enabled, get it started early
 419         if (!(RTC_CR & RTC_CR_OSCE)) {
 420                 RTC_SR = 0;
 421                 RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
 422         }
 423
 424         // release I/O pins hold, if we woke up from VLLS mode
 425         if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;
 426
 427         // TODO: do this while the PLL is waiting to lock....
 428         while (dest < &_edata) *dest++ = *src++;
 429         dest = &_sbss;
 430         while (dest < &_ebss) *dest++ = 0;
 431         SCB_VTOR = 0;   // use vector table in flash
 432
 433         // default all interrupts to medium priority level
 434         for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
 435
 436         // start in FEI mode
 437         // enable capacitors for crystal
 438         OSC0_CR = OSC_SC8P | OSC_SC2P;
 439         // enable osc, 8-32 MHz range, low power mode
 440         MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
 441         // switch to crystal as clock source, FLL input = 16 MHz / 512
 442         MCG_C1 =  MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
 443         // wait for crystal oscillator to begin
 444         while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
 445         // wait for FLL to use oscillator
 446         while ((MCG_S & MCG_S_IREFST) != 0) ;
 447         // wait for MCGOUT to use oscillator
 448         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
 449         // now we're in FBE mode
 450         // config PLL input for 16 MHz Crystal / 4 = 4 MHz
 451         MCG_C5 = MCG_C5_PRDIV0(3);
 452         // config PLL for 96 MHz output
 453         MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
 454         // wait for PLL to start using xtal as its input
 455         while (!(MCG_S & MCG_S_PLLST)) ;
 456         // wait for PLL to lock
 457         while (!(MCG_S & MCG_S_LOCK0)) ;
 458         // now we're in PBE mode
 459 #if F_CPU == 96000000
 460         // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
 461         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);
 462 #elif F_CPU == 48000000
 463         // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash
 464         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);
 465 #elif F_CPU == 24000000
 466         // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
 467         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |  SIM_CLKDIV1_OUTDIV4(3);
 468 #else
 469 #error "Error, F_CPU must be 96000000, 48000000, or 24000000"
 470 #endif
 471         // switch to PLL as clock source, FLL input = 16 MHz / 512
 472         MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
 473         // wait for PLL clock to be used
 474         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
 475         // now we're in PEE mode
 476         // configure USB for 48 MHz clock
 477         SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2
 478         // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
 479         SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
 480
 481         // initialize the SysTick counter
 482         SYST_RVR = (F_CPU / 1000) - 1;
 483         SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
 484
 485         //init_pins();
 486         __enable_irq();
 487
 488         //_init_Teensyduino_internal_(); XXX HaaTa - Why is this here? Perhaps fixed in a new version of the API?
 489         //if (RTC_SR & RTC_SR_TIF) rtc_set(TIME_T); XXX HaaTa - We don't care about the rtc
 490
 491         __libc_init_array();
 492
 493 /*
 494         for (ptr = &__init_array_start; ptr < &__init_array_end; ptr++) {
 495                 (*ptr)();
 496         }
 497 */
 498         startup_late_hook();
 499 #endif
 500         main();
 501         while (1) ;
 502 }
 503
 504 // TODO: is this needed for c++ and where does it come from?
 505 /*
 506 void _init(void)
 507 {
 508 }
 509 */
 510
 511 char *__brkval = (char *)&_ebss;
 512
 513 void * _sbrk(int incr)
 514 {
 515         //static char *heap_end = (char *)&_ebss;
 516         //char *prev = heap_end;
 517         //heap_end += incr;
 518
 519         char *prev = __brkval;
 520         __brkval += incr;
 521         return prev;
 522 }
 523
 524 __attribute__((weak))
 525 int _read(int file, char *ptr, int len)
 526 {
 527         return 0;
 528 }
 529
 530 /*  moved to Print.cpp, to support Print::printf()
 531 __attribute__((weak))
 532 int _write(int file, char *ptr, int len)
 533 {
 534         return 0;
 535 }
 536 */
 537
 538 __attribute__((weak))
 539 int _close(int fd)
 540 {
 541         return -1;
 542 }
 543
 544 #include <sys/stat.h>
 545
 546 __attribute__((weak))
 547 int _fstat(int fd, struct stat *st)
 548 {
 549         st->st_mode = S_IFCHR;
 550         return 0;
 551 }
 552
 553 __attribute__((weak))
 554 int _isatty(int fd)
 555 {
 556         return 1;
 557 }
 558
 559 __attribute__((weak))
 560 int _lseek(int fd, long long offset, int whence)
 561 {
 562         return -1;
 563 }
 564
 565 __attribute__((weak))
 566 void _exit(int status)
 567 {
 568         while (1);
 569 }
 570
 571 __attribute__((weak))
 572 void __cxa_pure_virtual()
 573 {
 574         while (1);
 575 }
 576
 577 __attribute__((weak))
 578 int __cxa_guard_acquire (int *g)
 579 {
 580         return 1;
 581 }
 582
 583 __attribute__((weak))
 584 void __cxa_guard_release(int *g)
 585 {
 586 }
 587
 588 int nvic_execution_priority(void)
 589 {
 590         int priority=256;
 591         uint32_t primask, faultmask, basepri, ipsr;
 592
 593         // full algorithm in ARM DDI0403D, page B1-639
 594         // this isn't quite complete, but hopefully good enough
 595         asm volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);
 596         if (faultmask) return -1;
 597         asm volatile("mrs %0, primask\n" : "=r" (primask)::);
 598         if (primask) return 0;
 599         asm volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);
 600         if (ipsr) {
 601                 if (ipsr < 16) priority = 0; // could be non-zero
 602                 else priority = NVIC_GET_PRIORITY(ipsr - 16);
 603         }
 604         asm volatile("mrs %0, basepri\n" : "=r" (basepri)::);
 605         if (basepri > 0 && basepri < priority) priority = basepri;
 606         return priority;
 607 }
 608