1 /* Teensyduino Core Library
2 * http://www.pjrc.com/teensy/
3 * Copyright (c) 2013 PJRC.COM, LLC.
4 * Modifications by Jacob Alexander 2014-2015
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * 1. The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * 2. If the Software is incorporated into a build system that allows
18 * selection among a list of target devices, then similar target
19 * devices manufactured by PJRC.COM must be included in the list of
20 * target devices and selectable in the same manner.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 // ----- Includes -----
35 #if defined(_bootloader_)
47 // ----- Variables -----
49 extern unsigned long _stext;
50 extern unsigned long _etext;
51 extern unsigned long _sdata;
52 extern unsigned long _edata;
53 extern unsigned long _sbss;
54 extern unsigned long _ebss;
55 extern unsigned long _estack;
57 const uint8_t sys_reset_to_loader_magic[22] = "\xff\x00\x7fRESET TO LOADER\x7f\x00\xff";
61 // ----- Function Declarations -----
68 // ----- Interrupts -----
76 // keep polling some communication while in fault
77 // mode, so we don't completely die.
78 if ( SIM_SCGC4 & SIM_SCGC4_USBOTG ) usb_isr();
79 if ( SIM_SCGC4 & SIM_SCGC4_UART0 ) uart0_status_isr();
80 if ( SIM_SCGC4 & SIM_SCGC4_UART1 ) uart1_status_isr();
81 if ( SIM_SCGC4 & SIM_SCGC4_UART2 ) uart2_status_isr();
92 extern volatile uint32_t systick_millis_count;
93 void systick_default_isr()
95 systick_millis_count++;
99 // NVIC - Non-Maskable Interrupt ISR
100 void nmi_default_isr()
106 // NVIC - Hard Fault ISR
107 void hard_fault_default_isr()
109 print("Hard Fault! SCB_HFSR: ");
110 printHex32( SCB_HFSR );
116 // NVIC - Memory Manager Fault ISR
117 void memmanage_fault_default_isr()
119 print("Memory Manager Fault! SCB_CFSR: ");
120 printHex32( SCB_CFSR );
121 print(" SCB_MMAR: ");
122 printHex32( SCB_MMAR );
127 // NVIC - Bus Fault ISR
128 void bus_fault_default_isr()
130 print("Bus Fault! SCB_CFSR: ");
131 printHex32( SCB_CFSR );
132 print(" SCB_BFAR: ");
133 printHex32( SCB_BFAR );
138 // NVIC - Usage Fault ISR
139 void usage_fault_default_isr()
141 print("Usage Fault! SCB_CFSR: ");
142 printHex32( SCB_CFSR );
147 // NVIC - Default ISR/Vector Linking
148 void nmi_isr() __attribute__ ((weak, alias("nmi_default_isr")));
149 void hard_fault_isr() __attribute__ ((weak, alias("hard_fault_default_isr")));
150 void memmanage_fault_isr() __attribute__ ((weak, alias("memmanage_fault_default_isr")));
151 void bus_fault_isr() __attribute__ ((weak, alias("bus_fault_default_isr")));
152 void usage_fault_isr() __attribute__ ((weak, alias("usage_fault_default_isr")));
153 void svcall_isr() __attribute__ ((weak, alias("unused_isr")));
154 void debugmonitor_isr() __attribute__ ((weak, alias("unused_isr")));
155 void pendablesrvreq_isr() __attribute__ ((weak, alias("unused_isr")));
156 void systick_isr() __attribute__ ((weak, alias("systick_default_isr")));
158 void dma_ch0_isr() __attribute__ ((weak, alias("unused_isr")));
159 void dma_ch1_isr() __attribute__ ((weak, alias("unused_isr")));
160 void dma_ch2_isr() __attribute__ ((weak, alias("unused_isr")));
161 void dma_ch3_isr() __attribute__ ((weak, alias("unused_isr")));
162 void dma_ch4_isr() __attribute__ ((weak, alias("unused_isr")));
163 void dma_ch5_isr() __attribute__ ((weak, alias("unused_isr")));
164 void dma_ch6_isr() __attribute__ ((weak, alias("unused_isr")));
165 void dma_ch7_isr() __attribute__ ((weak, alias("unused_isr")));
166 void dma_ch8_isr() __attribute__ ((weak, alias("unused_isr")));
167 void dma_ch9_isr() __attribute__ ((weak, alias("unused_isr")));
168 void dma_ch10_isr() __attribute__ ((weak, alias("unused_isr")));
169 void dma_ch11_isr() __attribute__ ((weak, alias("unused_isr")));
170 void dma_ch12_isr() __attribute__ ((weak, alias("unused_isr")));
171 void dma_ch13_isr() __attribute__ ((weak, alias("unused_isr")));
172 void dma_ch14_isr() __attribute__ ((weak, alias("unused_isr")));
173 void dma_ch15_isr() __attribute__ ((weak, alias("unused_isr")));
174 void dma_error_isr() __attribute__ ((weak, alias("unused_isr")));
175 void mcm_isr() __attribute__ ((weak, alias("unused_isr")));
176 void flash_cmd_isr() __attribute__ ((weak, alias("unused_isr")));
177 void flash_error_isr() __attribute__ ((weak, alias("unused_isr")));
178 void low_voltage_isr() __attribute__ ((weak, alias("unused_isr")));
179 void wakeup_isr() __attribute__ ((weak, alias("unused_isr")));
180 void watchdog_isr() __attribute__ ((weak, alias("unused_isr")));
181 void i2c0_isr() __attribute__ ((weak, alias("unused_isr")));
182 void i2c1_isr() __attribute__ ((weak, alias("unused_isr")));
183 void i2c2_isr() __attribute__ ((weak, alias("unused_isr")));
184 void spi0_isr() __attribute__ ((weak, alias("unused_isr")));
185 void spi1_isr() __attribute__ ((weak, alias("unused_isr")));
186 void spi2_isr() __attribute__ ((weak, alias("unused_isr")));
187 void sdhc_isr() __attribute__ ((weak, alias("unused_isr")));
188 void can0_message_isr() __attribute__ ((weak, alias("unused_isr")));
189 void can0_bus_off_isr() __attribute__ ((weak, alias("unused_isr")));
190 void can0_error_isr() __attribute__ ((weak, alias("unused_isr")));
191 void can0_tx_warn_isr() __attribute__ ((weak, alias("unused_isr")));
192 void can0_rx_warn_isr() __attribute__ ((weak, alias("unused_isr")));
193 void can0_wakeup_isr() __attribute__ ((weak, alias("unused_isr")));
194 void i2s0_tx_isr() __attribute__ ((weak, alias("unused_isr")));
195 void i2s0_rx_isr() __attribute__ ((weak, alias("unused_isr")));
196 void uart0_lon_isr() __attribute__ ((weak, alias("unused_isr")));
197 void uart0_status_isr() __attribute__ ((weak, alias("unused_isr")));
198 void uart0_error_isr() __attribute__ ((weak, alias("unused_isr")));
199 void uart1_status_isr() __attribute__ ((weak, alias("unused_isr")));
200 void uart1_error_isr() __attribute__ ((weak, alias("unused_isr")));
201 void uart2_status_isr() __attribute__ ((weak, alias("unused_isr")));
202 void uart2_error_isr() __attribute__ ((weak, alias("unused_isr")));
203 void uart3_status_isr() __attribute__ ((weak, alias("unused_isr")));
204 void uart3_error_isr() __attribute__ ((weak, alias("unused_isr")));
205 void uart4_status_isr() __attribute__ ((weak, alias("unused_isr")));
206 void uart4_error_isr() __attribute__ ((weak, alias("unused_isr")));
207 void uart5_status_isr() __attribute__ ((weak, alias("unused_isr")));
208 void uart5_error_isr() __attribute__ ((weak, alias("unused_isr")));
209 void adc0_isr() __attribute__ ((weak, alias("unused_isr")));
210 void adc1_isr() __attribute__ ((weak, alias("unused_isr")));
211 void cmp0_isr() __attribute__ ((weak, alias("unused_isr")));
212 void cmp1_isr() __attribute__ ((weak, alias("unused_isr")));
213 void cmp2_isr() __attribute__ ((weak, alias("unused_isr")));
214 void ftm0_isr() __attribute__ ((weak, alias("unused_isr")));
215 void ftm1_isr() __attribute__ ((weak, alias("unused_isr")));
216 void ftm2_isr() __attribute__ ((weak, alias("unused_isr")));
217 void ftm3_isr() __attribute__ ((weak, alias("unused_isr")));
218 void cmt_isr() __attribute__ ((weak, alias("unused_isr")));
219 void rtc_alarm_isr() __attribute__ ((weak, alias("unused_isr")));
220 void rtc_seconds_isr() __attribute__ ((weak, alias("unused_isr")));
221 void pit0_isr() __attribute__ ((weak, alias("unused_isr")));
222 void pit1_isr() __attribute__ ((weak, alias("unused_isr")));
223 void pit2_isr() __attribute__ ((weak, alias("unused_isr")));
224 void pit3_isr() __attribute__ ((weak, alias("unused_isr")));
225 void pdb_isr() __attribute__ ((weak, alias("unused_isr")));
226 void usb_isr() __attribute__ ((weak, alias("unused_isr")));
227 void usb_charge_isr() __attribute__ ((weak, alias("unused_isr")));
228 void dac0_isr() __attribute__ ((weak, alias("unused_isr")));
229 void dac1_isr() __attribute__ ((weak, alias("unused_isr")));
230 void tsi0_isr() __attribute__ ((weak, alias("unused_isr")));
231 void mcg_isr() __attribute__ ((weak, alias("unused_isr")));
232 void lptmr_isr() __attribute__ ((weak, alias("unused_isr")));
233 void porta_isr() __attribute__ ((weak, alias("unused_isr")));
234 void portb_isr() __attribute__ ((weak, alias("unused_isr")));
235 void portc_isr() __attribute__ ((weak, alias("unused_isr")));
236 void portd_isr() __attribute__ ((weak, alias("unused_isr")));
237 void porte_isr() __attribute__ ((weak, alias("unused_isr")));
238 void software_isr() __attribute__ ((weak, alias("unused_isr")));
241 // NVIC - Interrupt Vector Table
242 __attribute__ ((section(".vectors"), used))
243 void (* const gVectors[])() =
245 (void (*)(void))((unsigned long)&_estack), // 0 ARM: Initial Stack Pointer
246 ResetHandler, // 1 ARM: Initial Program Counter
247 nmi_isr, // 2 ARM: Non-maskable Interrupt (NMI)
248 hard_fault_isr, // 3 ARM: Hard Fault
249 memmanage_fault_isr, // 4 ARM: MemManage Fault
250 bus_fault_isr, // 5 ARM: Bus Fault
251 usage_fault_isr, // 6 ARM: Usage Fault
256 svcall_isr, // 11 ARM: Supervisor call (SVCall)
257 debugmonitor_isr, // 12 ARM: Debug Monitor
259 pendablesrvreq_isr, // 14 ARM: Pendable req serv(PendableSrvReq)
260 systick_isr, // 15 ARM: System tick timer (SysTick)
261 #if defined(_mk20dx128_) || defined(_mk20dx128vlf5_)
262 dma_ch0_isr, // 16 DMA channel 0 transfer complete
263 dma_ch1_isr, // 17 DMA channel 1 transfer complete
264 dma_ch2_isr, // 18 DMA channel 2 transfer complete
265 dma_ch3_isr, // 19 DMA channel 3 transfer complete
266 dma_error_isr, // 20 DMA error interrupt channel
267 unused_isr, // 21 DMA --
268 flash_cmd_isr, // 22 Flash Memory Command complete
269 flash_error_isr, // 23 Flash Read collision
270 low_voltage_isr, // 24 Low-voltage detect/warning
271 wakeup_isr, // 25 Low Leakage Wakeup
272 watchdog_isr, // 26 Both EWM and WDOG interrupt
275 i2s0_tx_isr, // 29 I2S0 Transmit
276 i2s0_rx_isr, // 30 I2S0 Receive
277 uart0_lon_isr, // 31 UART0 CEA709.1-B (LON) status
278 uart0_status_isr, // 32 UART0 status
279 uart0_error_isr, // 33 UART0 error
280 uart1_status_isr, // 34 UART1 status
281 uart1_error_isr, // 35 UART1 error
282 uart2_status_isr, // 36 UART2 status
283 uart2_error_isr, // 37 UART2 error
290 rtc_alarm_isr, // 44 RTC Alarm interrupt
291 rtc_seconds_isr, // 45 RTC Seconds interrupt
292 pit0_isr, // 46 PIT Channel 0
293 pit1_isr, // 47 PIT Channel 1
294 pit2_isr, // 48 PIT Channel 2
295 pit3_isr, // 49 PIT Channel 3
296 pdb_isr, // 50 PDB Programmable Delay Block
297 usb_isr, // 51 USB OTG
298 usb_charge_isr, // 52 USB Charger Detect
301 lptmr_isr, // 55 Low Power Timer
302 porta_isr, // 56 Pin detect (Port A)
303 portb_isr, // 57 Pin detect (Port B)
304 portc_isr, // 58 Pin detect (Port C)
305 portd_isr, // 59 Pin detect (Port D)
306 porte_isr, // 60 Pin detect (Port E)
307 software_isr, // 61 Software interrupt
308 #elif defined(_mk20dx256_) || defined(_mk20dx256vlh7_)
309 dma_ch0_isr, // 16 DMA channel 0 transfer complete
310 dma_ch1_isr, // 17 DMA channel 1 transfer complete
311 dma_ch2_isr, // 18 DMA channel 2 transfer complete
312 dma_ch3_isr, // 19 DMA channel 3 transfer complete
313 dma_ch4_isr, // 20 DMA channel 4 transfer complete
314 dma_ch5_isr, // 21 DMA channel 5 transfer complete
315 dma_ch6_isr, // 22 DMA channel 6 transfer complete
316 dma_ch7_isr, // 23 DMA channel 7 transfer complete
317 dma_ch8_isr, // 24 DMA channel 8 transfer complete
318 dma_ch9_isr, // 25 DMA channel 9 transfer complete
319 dma_ch10_isr, // 26 DMA channel 10 transfer complete
320 dma_ch11_isr, // 27 DMA channel 10 transfer complete
321 dma_ch12_isr, // 28 DMA channel 10 transfer complete
322 dma_ch13_isr, // 29 DMA channel 10 transfer complete
323 dma_ch14_isr, // 30 DMA channel 10 transfer complete
324 dma_ch15_isr, // 31 DMA channel 10 transfer complete
325 dma_error_isr, // 32 DMA error interrupt channel
327 flash_cmd_isr, // 34 Flash Memory Command complete
328 flash_error_isr, // 35 Flash Read collision
329 low_voltage_isr, // 36 Low-voltage detect/warning
330 wakeup_isr, // 37 Low Leakage Wakeup
331 watchdog_isr, // 38 Both EWM and WDOG interrupt
338 can0_message_isr, // 45 CAN OR'ed Message buffer (0-15)
339 can0_bus_off_isr, // 46 CAN Bus Off
340 can0_error_isr, // 47 CAN Error
341 can0_tx_warn_isr, // 48 CAN Transmit Warning
342 can0_rx_warn_isr, // 49 CAN Receive Warning
343 can0_wakeup_isr, // 50 CAN Wake Up
344 i2s0_tx_isr, // 51 I2S0 Transmit
345 i2s0_rx_isr, // 52 I2S0 Receive
353 uart0_lon_isr, // 60 UART0 CEA709.1-B (LON) status
354 uart0_status_isr, // 61 UART0 status
355 uart0_error_isr, // 62 UART0 error
356 uart1_status_isr, // 63 UART1 status
357 uart1_error_isr, // 64 UART1 error
358 uart2_status_isr, // 65 UART2 status
359 uart2_error_isr, // 66 UART2 error
375 rtc_alarm_isr, // 82 RTC Alarm interrupt
376 rtc_seconds_isr, // 83 RTC Seconds interrupt
377 pit0_isr, // 84 PIT Channel 0
378 pit1_isr, // 85 PIT Channel 1
379 pit2_isr, // 86 PIT Channel 2
380 pit3_isr, // 87 PIT Channel 3
381 pdb_isr, // 88 PDB Programmable Delay Block
382 usb_isr, // 89 USB OTG
383 usb_charge_isr, // 90 USB Charger Detect
394 lptmr_isr, // 101 Low Power Timer
395 unused_isr, // 102 --
396 porta_isr, // 103 Pin detect (Port A)
397 portb_isr, // 104 Pin detect (Port B)
398 portc_isr, // 105 Pin detect (Port C)
399 portd_isr, // 106 Pin detect (Port D)
400 porte_isr, // 107 Pin detect (Port E)
401 unused_isr, // 108 --
402 unused_isr, // 109 --
403 software_isr, // 110 Software interrupt
408 // ----- Flash Configuration -----
410 // Only necessary for Teensy 3s, MCHCK uses the Bootloader to handle this
411 #if defined(_mk20dx128_) || defined(_mk20dx256_)
412 __attribute__ ((section(".flashconfig"), used))
413 const uint8_t flashconfigbytes[16] = {
414 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
415 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF
417 #elif defined(_mk20dx128vlf5_) && defined(_bootloader_)
418 // XXX Byte labels may be in incorrect positions, double check before modifying
419 // FSEC is in correct location -Jacob
420 __attribute__ ((section(".flashconfig"), used))
421 const uint8_t flashconfigbytes[16] = {
422 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Backdoor Verif Key 28.3.1
425 // Protecting the first 4k of Flash memory from being over-written while running (bootloader protection)
426 // Still possible to overwrite the bootloader using an external flashing device
427 // For more details see:
428 // http://cache.freescale.com/files/training/doc/dwf/AMF_ENT_T1031_Boston.pdf (page 8)
429 // http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4507.pdf
430 // http://cache.freescale.com/files/32bit/doc/ref_manual/K20P48M50SF0RM.pdf (28.34.6)
432 0xFF, 0xFF, 0xFF, 0xFE, // Program Flash Protection Bytes FPROT0-3
434 0xBE, // Flash security byte FSEC
435 0x03, // Flash nonvolatile option byte FOPT
436 0xFF, // EEPROM Protection Byte FEPROT
437 0xFF, // Data Flash Protection Byte FDPROT
439 #elif defined(_mk20dx256vlh7_) && defined(_bootloader_)
440 // XXX Byte labels may be in incorrect positions, double check before modifying
441 // FSEC is in correct location -Jacob
442 __attribute__ ((section(".flashconfig"), used))
443 const uint8_t flashconfigbytes[16] = {
444 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Backdoor Verif Key 28.3.1
447 // Protecting the first 8k of Flash memory from being over-written while running (bootloader protection)
448 // Still possible to overwrite the bootloader using an external flashing device
449 // For more details see:
450 // http://cache.freescale.com/files/training/doc/dwf/AMF_ENT_T1031_Boston.pdf (page 8)
451 // http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4507.pdf
452 // http://cache.freescale.com/files/32bit/doc/ref_manual/K20P64M72SF1RM.pdf (28.34.6)
454 0xFF, 0xFF, 0xFF, 0xFE, // Program Flash Protection Bytes FPROT0-3
456 0xBE, // Flash security byte FSEC
457 0x03, // Flash nonvolatile option byte FOPT
458 0xFF, // EEPROM Protection Byte FEPROT
459 0xFF, // Data Flash Protection Byte FDPROT
465 // ----- Functions -----
467 #if ( defined(_mk20dx128vlf5_) || defined(_mk20dx256vlh7_) ) && defined(_bootloader_) // Bootloader Section
468 __attribute__((noreturn))
469 static inline void jump_to_app( uintptr_t addr )
472 __asm__("ldr sp, [%[addr], #0]\n"
473 "ldr pc, [%[addr], #4]"
474 :: [addr] "r" (addr));
476 __builtin_unreachable();
480 void *memset( void *addr, int val, unsigned int len )
484 for (; len > 0; --len, ++buf)
489 int memcmp( const void *a, const void *b, unsigned int len )
491 const uint8_t *ap = a, *bp = b;
494 for (; len > 0 && (val = *ap - *bp) == 0; --len, ++ap, ++bp)
499 void *memcpy( void *dst, const void *src, unsigned int len )
502 const char *srcbuf = src;
504 for (; len > 0; --len, ++dstbuf, ++srcbuf)
511 // ----- Chip Entry Point -----
513 __attribute__ ((section(".startup")))
516 #if ( defined(_mk20dx128vlf5_) || defined(_mk20dx256vlh7_) ) && defined(_bootloader_) // Bootloader Section
517 extern uint32_t _app_rom;
519 // We treat _app_rom as pointer to directly read the stack
520 // pointer and check for valid app code. This is no fool
521 // proof method, but it should help for the first flash.
523 // Purposefully disabling the watchdog *after* the reset check this way
524 // if the chip goes into an odd state we'll reset to the bootloader (invalid firmware image)
527 // Also checking for ARM lock-up signal (invalid firmware image)
529 if ( // PIN (External Reset Pin/Switch)
531 // WDOG (Watchdog timeout)
533 // LOCKUP (ARM Core LOCKUP event)
536 || _app_rom == 0xffffffff
538 || memcmp( (uint8_t*)&VBAT, sys_reset_to_loader_magic, sizeof(sys_reset_to_loader_magic) ) == 0
541 memset( (uint8_t*)&VBAT, 0, sizeof(VBAT) );
545 uint32_t addr = (uintptr_t)&_app_rom;
546 SCB_VTOR = addr; // relocate vector table
551 WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
552 WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
553 WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;
555 uint32_t *src = (uint32_t*)&_etext;
556 uint32_t *dest = (uint32_t*)&_sdata;
558 // Enable clocks to always-used peripherals
559 SIM_SCGC5 = 0x00043F82; // Clocks active to all GPIO
560 SIM_SCGC6 = SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
561 #if defined(_mk20dx128_)
562 SIM_SCGC6 |= SIM_SCGC6_RTC;
563 #elif defined(_mk20dx256_) || defined(_mk20dx256vlh7_)
564 SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2;
565 SIM_SCGC6 |= SIM_SCGC6_RTC;
568 #if defined(_mk20dx128_) || defined(_mk20dx256_) // Teensy 3s
569 // if the RTC oscillator isn't enabled, get it started early
570 if ( !(RTC_CR & RTC_CR_OSCE) )
573 RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
577 // release I/O pins hold, if we woke up from VLLS mode
578 if ( PMC_REGSC & PMC_REGSC_ACKISO )
580 PMC_REGSC |= PMC_REGSC_ACKISO;
584 while ( dest < (uint32_t*)&_edata ) *dest++ = *src++;
585 dest = (uint32_t*)&_sbss;
586 while ( dest < (uint32_t*)&_ebss ) *dest++ = 0;
588 // MCHCK / Kiibohd-dfu
589 #if defined(_mk20dx128vlf5_)
590 // Default all interrupts to medium priority level
591 for ( unsigned int i = 0; i < NVIC_NUM_INTERRUPTS; i++ )
593 NVIC_SET_PRIORITY( i, 128 );
597 MCG_C4 = MCG_C4_DMX32 | MCG_C4_DRST_DRS( 1 );
599 // USB Clock and FLL select
600 SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_TRACECLKSEL;
602 // Teensy 3.0 and 3.1 and Kiibohd-dfu (mk20dx256vlh7)
604 #if defined(_mk20dx128_) || defined(_mk20dx256_)
605 // use vector table in flash
609 // default all interrupts to medium priority level
610 for ( unsigned int i = 0; i < NVIC_NUM_INTERRUPTS; i++ )
612 NVIC_SET_PRIORITY( i, 128 );
616 // enable capacitors for crystal
617 OSC0_CR = OSC_SC8P | OSC_SC2P;
619 // enable osc, 8-32 MHz range, low power mode
620 MCG_C2 = MCG_C2_RANGE0( 2 ) | MCG_C2_EREFS;
622 // switch to crystal as clock source, FLL input = 16 MHz / 512
623 MCG_C1 = MCG_C1_CLKS( 2 ) | MCG_C1_FRDIV( 4 );
625 // wait for crystal oscillator to begin
626 while ( (MCG_S & MCG_S_OSCINIT0) == 0 );
628 // wait for FLL to use oscillator
629 while ( (MCG_S & MCG_S_IREFST) != 0 );
631 // wait for MCGOUT to use oscillator
632 while ( (MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST( 2 ) );
634 // now we're in FBE mode
635 #if F_CPU == 72000000
636 // config PLL input for 16 MHz Crystal / 8 = 2 MHz
637 MCG_C5 = MCG_C5_PRDIV0( 7 );
639 // config PLL input for 16 MHz Crystal / 4 = 4 MHz
640 MCG_C5 = MCG_C5_PRDIV0( 3 );
643 #if F_CPU == 72000000
644 // config PLL for 72 MHz output (36 * 2 MHz Ext PLL)
645 MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0( 12 );
647 // config PLL for 96 MHz output
648 MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0( 0 );
651 // wait for PLL to start using xtal as its input
652 while ( !(MCG_S & MCG_S_PLLST) );
654 // wait for PLL to lock
655 while ( !(MCG_S & MCG_S_LOCK0) );
657 // now we're in PBE mode
658 #if F_CPU == 96000000
659 // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
660 SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1( 0 ) | SIM_CLKDIV1_OUTDIV2( 1 ) | SIM_CLKDIV1_OUTDIV4( 3 );
661 #elif F_CPU == 72000000
662 // config divisors: 72 MHz core, 36 MHz bus, 24 MHz flash
663 SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1( 0 ) | SIM_CLKDIV1_OUTDIV2( 1 ) | SIM_CLKDIV1_OUTDIV4( 2 );
664 #elif F_CPU == 48000000
665 // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash
666 SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1( 1 ) | SIM_CLKDIV1_OUTDIV2( 1 ) | SIM_CLKDIV1_OUTDIV4( 3 );
667 #elif F_CPU == 24000000
668 // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
669 SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1( 3 ) | SIM_CLKDIV1_OUTDIV2( 3 ) | SIM_CLKDIV1_OUTDIV4( 3 );
671 #error "Error, F_CPU must be 96000000, 72000000, 48000000, or 24000000"
673 // switch to PLL as clock source, FLL input = 16 MHz / 512
674 MCG_C1 = MCG_C1_CLKS( 0 ) | MCG_C1_FRDIV( 4 );
676 // wait for PLL clock to be used
677 while ( (MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST( 3 ) );
679 // now we're in PEE mode
680 #if F_CPU == 72000000
681 // configure USB for 48 MHz clock
682 SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV( 2 ) | SIM_CLKDIV2_USBFRAC; // USB = 72 MHz PLL / 1.5
684 // configure USB for 48 MHz clock
685 SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV( 1 ); // USB = 96 MHz PLL / 2
688 // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
689 SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL( 6 );
693 #if !defined(_bootloader_)
694 // Initialize the SysTick counter
695 SYST_RVR = (F_CPU / 1000) - 1;
696 SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
700 // Disable Watchdog for bootloader
701 WDOG_STCTRLH &= ~WDOG_STCTRLH_WDOGEN;
705 while ( 1 ); // Shouldn't get here...
710 // ----- RAM Setup -----
712 char *__brkval = (char *)&_ebss;
714 void * _sbrk( int incr )
716 char *prev = __brkval;
723 // ----- Interrupt Execution Priority -----
725 int nvic_execution_priority()
728 uint32_t primask, faultmask, basepri, ipsr;
730 // full algorithm in ARM DDI0403D, page B1-639
731 // this isn't quite complete, but hopefully good enough
732 asm volatile( "mrs %0, faultmask\n" : "=r" (faultmask):: );
738 asm volatile( "mrs %0, primask\n" : "=r" (primask):: );
744 asm volatile( "mrs %0, ipsr\n" : "=r" (ipsr):: );
749 priority = 0; // could be non-zero
753 priority = NVIC_GET_PRIORITY( ipsr - 16 );
757 asm volatile( "mrs %0, basepri\n" : "=r" (basepri):: );
758 if ( basepri > 0 && basepri < priority )