quantum/stm32/mcuconf.h

   1 /*
   2     ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
   3
   4     Licensed under the Apache License, Version 2.0 (the "License");
   5     you may not use this file except in compliance with the License.
   6     You may obtain a copy of the License at
   7
   8         http://www.apache.org/licenses/LICENSE-2.0
   9
  10     Unless required by applicable law or agreed to in writing, software
  11     distributed under the License is distributed on an "AS IS" BASIS,
  12     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13     See the License for the specific language governing permissions and
  14     limitations under the License.
  15 */
  16
  17 #ifndef MCUCONF_H
  18 #define MCUCONF_H
  19
  20 /*
  21  * STM32F3xx drivers configuration.
  22  * The following settings override the default settings present in
  23  * the various device driver implementation headers.
  24  * Note that the settings for each driver only have effect if the whole
  25  * driver is enabled in halconf.h.
  26  *
  27  * IRQ priorities:
  28  * 15...0       Lowest...Highest.
  29  *
  30  * DMA priorities:
  31  * 0...3        Lowest...Highest.
  32  */
  33
  34 #define STM32F3xx_MCUCONF
  35
  36 /*
  37  * HAL driver system settings.
  38  */
  39 #define STM32_NO_INIT                       FALSE
  40 #define STM32_PVD_ENABLE                    FALSE
  41 #define STM32_PLS                           STM32_PLS_LEV0
  42 #define STM32_HSI_ENABLED                   TRUE
  43 #define STM32_LSI_ENABLED                   TRUE
  44 #define STM32_HSE_ENABLED                   TRUE
  45 #define STM32_LSE_ENABLED                   FALSE
  46 #define STM32_SW                            STM32_SW_PLL
  47 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
  48 #define STM32_PREDIV_VALUE                  1
  49 #define STM32_PLLMUL_VALUE                  9
  50 #define STM32_HPRE                          STM32_HPRE_DIV1
  51 #define STM32_PPRE1                         STM32_PPRE1_DIV2
  52 #define STM32_PPRE2                         STM32_PPRE2_DIV2
  53 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
  54 #define STM32_ADC12PRES                     STM32_ADC12PRES_DIV1
  55 #define STM32_ADC34PRES                     STM32_ADC34PRES_DIV1
  56 #define STM32_USART1SW                      STM32_USART1SW_PCLK
  57 #define STM32_USART2SW                      STM32_USART2SW_PCLK
  58 #define STM32_USART3SW                      STM32_USART3SW_PCLK
  59 #define STM32_UART4SW                       STM32_UART4SW_PCLK
  60 #define STM32_UART5SW                       STM32_UART5SW_PCLK
  61 #define STM32_I2C1SW                        STM32_I2C1SW_SYSCLK
  62 #define STM32_I2C2SW                        STM32_I2C2SW_SYSCLK
  63 #define STM32_TIM1SW                        STM32_TIM1SW_PCLK2
  64 #define STM32_TIM8SW                        STM32_TIM8SW_PCLK2
  65 #define STM32_RTCSEL                        STM32_RTCSEL_LSI
  66 #define STM32_USB_CLOCK_REQUIRED            TRUE
  67 #define STM32_USBPRE                        STM32_USBPRE_DIV1P5
  68
  69 #undef STM32_HSE_BYPASS
  70 // #error "oh no"
  71 // #endif
  72
  73 /*
  74  * ADC driver system settings.
  75  */
  76 #define STM32_ADC_DUAL_MODE                 FALSE
  77 #define STM32_ADC_COMPACT_SAMPLES           FALSE
  78 #define STM32_ADC_USE_ADC1                  FALSE
  79 #define STM32_ADC_USE_ADC2                  FALSE
  80 #define STM32_ADC_USE_ADC3                  FALSE
  81 #define STM32_ADC_USE_ADC4                  FALSE
  82 #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)
  83 #define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
  84 #define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 5)
  85 #define STM32_ADC_ADC4_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
  86 #define STM32_ADC_ADC1_DMA_PRIORITY         2
  87 #define STM32_ADC_ADC2_DMA_PRIORITY         2
  88 #define STM32_ADC_ADC3_DMA_PRIORITY         2
  89 #define STM32_ADC_ADC4_DMA_PRIORITY         2
  90 #define STM32_ADC_ADC12_IRQ_PRIORITY        5
  91 #define STM32_ADC_ADC3_IRQ_PRIORITY         5
  92 #define STM32_ADC_ADC4_IRQ_PRIORITY         5
  93 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
  94 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5
  95 #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5
  96 #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY     5
  97 #define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1
  98 #define STM32_ADC_ADC34_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1
  99
 100 /*
 101  * CAN driver system settings.
 102  */
 103 #define STM32_CAN_USE_CAN1                  FALSE
 104 #define STM32_CAN_CAN1_IRQ_PRIORITY         11
 105
 106 /*
 107  * DAC driver system settings.
 108  */
 109 #define STM32_DAC_DUAL_MODE                 FALSE
 110 #define STM32_DAC_USE_DAC1_CH1              TRUE
 111 #define STM32_DAC_USE_DAC1_CH2              TRUE
 112 #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
 113 #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
 114 #define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
 115 #define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
 116
 117 /*
 118  * EXT driver system settings.
 119  */
 120 #define STM32_EXT_EXTI0_IRQ_PRIORITY        6
 121 #define STM32_EXT_EXTI1_IRQ_PRIORITY        6
 122 #define STM32_EXT_EXTI2_IRQ_PRIORITY        6
 123 #define STM32_EXT_EXTI3_IRQ_PRIORITY        6
 124 #define STM32_EXT_EXTI4_IRQ_PRIORITY        6
 125 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
 126 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
 127 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6
 128 #define STM32_EXT_EXTI17_IRQ_PRIORITY       6
 129 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6
 130 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6
 131 #define STM32_EXT_EXTI20_IRQ_PRIORITY       6
 132 #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
 133 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY    6
 134 #define STM32_EXT_EXTI33_IRQ_PRIORITY       6
 135
 136 /*
 137  * GPT driver system settings.
 138  */
 139 #define STM32_GPT_USE_TIM1                  FALSE
 140 #define STM32_GPT_USE_TIM2                  FALSE
 141 #define STM32_GPT_USE_TIM3                  FALSE
 142 #define STM32_GPT_USE_TIM4                  FALSE
 143 #define STM32_GPT_USE_TIM6                  TRUE
 144 #define STM32_GPT_USE_TIM7                  TRUE
 145 #define STM32_GPT_USE_TIM8                  TRUE
 146 #define STM32_GPT_TIM1_IRQ_PRIORITY         7
 147 #define STM32_GPT_TIM2_IRQ_PRIORITY         7
 148 #define STM32_GPT_TIM3_IRQ_PRIORITY         7
 149 #define STM32_GPT_TIM4_IRQ_PRIORITY         7
 150 #define STM32_GPT_TIM6_IRQ_PRIORITY         7
 151 #define STM32_GPT_TIM7_IRQ_PRIORITY         7
 152 #define STM32_GPT_TIM8_IRQ_PRIORITY         7
 153
 154 /*
 155  * I2C driver system settings.
 156  */
 157 #define STM32_I2C_USE_I2C1                  FALSE
 158 #define STM32_I2C_USE_I2C2                  FALSE
 159 #define STM32_I2C_BUSY_TIMEOUT              50
 160 #define STM32_I2C_I2C1_IRQ_PRIORITY         10
 161 #define STM32_I2C_I2C2_IRQ_PRIORITY         10
 162 #define STM32_I2C_USE_DMA                   TRUE
 163 #define STM32_I2C_I2C1_DMA_PRIORITY         1
 164 #define STM32_I2C_I2C2_DMA_PRIORITY         1
 165 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 166
 167 /*
 168  * ICU driver system settings.
 169  */
 170 #define STM32_ICU_USE_TIM1                  FALSE
 171 #define STM32_ICU_USE_TIM2                  FALSE
 172 #define STM32_ICU_USE_TIM3                  FALSE
 173 #define STM32_ICU_USE_TIM4                  FALSE
 174 #define STM32_ICU_USE_TIM8                  FALSE
 175 #define STM32_ICU_TIM1_IRQ_PRIORITY         7
 176 #define STM32_ICU_TIM2_IRQ_PRIORITY         7
 177 #define STM32_ICU_TIM3_IRQ_PRIORITY         7
 178 #define STM32_ICU_TIM4_IRQ_PRIORITY         7
 179 #define STM32_ICU_TIM8_IRQ_PRIORITY         7
 180
 181 /*
 182  * PWM driver system settings.
 183  */
 184 #define STM32_PWM_USE_ADVANCED              FALSE
 185 #define STM32_PWM_USE_TIM1                  FALSE
 186 #define STM32_PWM_USE_TIM2                  TRUE
 187 #define STM32_PWM_USE_TIM3                  TRUE
 188 #define STM32_PWM_USE_TIM4                  FALSE
 189 #define STM32_PWM_USE_TIM8                  FALSE
 190 #define STM32_PWM_TIM1_IRQ_PRIORITY         7
 191 #define STM32_PWM_TIM2_IRQ_PRIORITY         7
 192 #define STM32_PWM_TIM3_IRQ_PRIORITY         7
 193 #define STM32_PWM_TIM4_IRQ_PRIORITY         7
 194 #define STM32_PWM_TIM8_IRQ_PRIORITY         7
 195
 196 /*
 197  * SERIAL driver system settings.
 198  */
 199 #define STM32_SERIAL_USE_USART1             FALSE
 200 #define STM32_SERIAL_USE_USART2             TRUE
 201 #define STM32_SERIAL_USE_USART3             FALSE
 202 #define STM32_SERIAL_USE_UART4              FALSE
 203 #define STM32_SERIAL_USE_UART5              FALSE
 204 #define STM32_SERIAL_USART1_PRIORITY        12
 205 #define STM32_SERIAL_USART2_PRIORITY        12
 206 #define STM32_SERIAL_USART3_PRIORITY        12
 207 #define STM32_SERIAL_UART4_PRIORITY         12
 208 #define STM32_SERIAL_UART5_PRIORITY         12
 209
 210 /*
 211  * SPI driver system settings.
 212  */
 213 #define STM32_SPI_USE_SPI1                  FALSE
 214 #define STM32_SPI_USE_SPI2                  FALSE
 215 #define STM32_SPI_USE_SPI3                  FALSE
 216 #define STM32_SPI_SPI1_DMA_PRIORITY         1
 217 #define STM32_SPI_SPI2_DMA_PRIORITY         1
 218 #define STM32_SPI_SPI3_DMA_PRIORITY         1
 219 #define STM32_SPI_SPI1_IRQ_PRIORITY         10
 220 #define STM32_SPI_SPI2_IRQ_PRIORITY         10
 221 #define STM32_SPI_SPI3_IRQ_PRIORITY         10
 222 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
 223
 224 /*
 225  * ST driver system settings.
 226  */
 227 #define STM32_ST_IRQ_PRIORITY               8
 228 #define STM32_ST_USE_TIMER                  2
 229
 230 /*
 231  * UART driver system settings.
 232  */
 233 #define STM32_UART_USE_USART1               FALSE
 234 #define STM32_UART_USE_USART2               FALSE
 235 #define STM32_UART_USE_USART3               FALSE
 236 #define STM32_UART_USART1_IRQ_PRIORITY      12
 237 #define STM32_UART_USART2_IRQ_PRIORITY      12
 238 #define STM32_UART_USART3_IRQ_PRIORITY      12
 239 #define STM32_UART_USART1_DMA_PRIORITY      0
 240 #define STM32_UART_USART2_DMA_PRIORITY      0
 241 #define STM32_UART_USART3_DMA_PRIORITY      0
 242 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
 243
 244 /*
 245  * USB driver system settings.
 246  */
 247 #define STM32_USB_USE_USB1                  TRUE
 248 #define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
 249 #define STM32_USB_USB1_HP_IRQ_PRIORITY      13
 250 #define STM32_USB_USB1_LP_IRQ_PRIORITY      14
 251
 252 /*
 253  * WDG driver system settings.
 254  */
 255 #define STM32_WDG_USE_IWDG                  FALSE
 256
 257 #endif /* MCUCONF_H */