/* Teensyduino Core Library
* http://www.pjrc.com/teensy/
* Copyright (c) 2013 PJRC.COM, LLC.
- * Modified by Jacob Alexander 2014
+ * Modified by Jacob Alexander 2014-2015
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* SOFTWARE.
*/
-#ifndef _mk20dx_h_
-#define _mk20dx_h_
+#pragma once
// ----- Defines -----
#if (F_CPU == 96000000)
- #define F_BUS 48000000
- #define F_MEM 24000000
+ #define F_BUS 48000000
+ #define F_MEM 24000000
+#elif (F_CPU == 72000000)
+ #define F_BUS 36000000
+ #define F_MEM 24000000
#elif (F_CPU == 48000000)
- #define F_BUS 48000000
- #define F_MEM 24000000
+ #define F_BUS 48000000
+ #define F_MEM 24000000
#elif (F_CPU == 24000000)
- #define F_BUS 24000000
- #define F_MEM 24000000
+ #define F_BUS 24000000
+ #define F_MEM 24000000
#endif
#define SPI_SR_TFFF (uint32_t)0x02000000 // Transmit FIFO Fill Flag
#define SPI_SR_RFOF (uint32_t)0x00080000 // Receive FIFO Overflow Flag
#define SPI_SR_RFDF (uint32_t)0x00020000 // Receive FIFO Drain Flag
+#define SPI_SR_TXCTR (uint32_t)0x0000F000 // Transmit FIFO Counter
+#define SPI_SR_TXNXTPTR (uint32_t)0x00000F00 // Transmit Next, Pointer
+#define SPI_SR_RXCTR (uint32_t)0x000000F0 // Receive FIFO Counter
+#define SPI_SR_POPNXTPTR (uint32_t)0x0000000F // Pop Next, Pointer
#define SPI0_RSER *(volatile uint32_t *)0x4002C030 // DSPI DMA/Interrupt Request Select and Enable Register
#define SPI_RSER_TCF_RE (uint32_t)0x80000000 // Transmission Complete Request Enable
#define SPI_RSER_EOQF_RE (uint32_t)0x10000000 // DSPI Finished Request Request Enable
#define SCB_CFSR *(volatile uint32_t *)0xE000ED28 // Configurable Fault Status Register
#define SCB_HFSR *(volatile uint32_t *)0xE000ED2C // HardFault Status
#define SCB_DFSR *(volatile uint32_t *)0xE000ED30 // Debug Fault Status
-#define SCB_MMFAR *(volatile uint32_t *)0xE000ED34 // MemManage Fault Address
+#define SCB_MMAR *(volatile uint32_t *)0xE000ED34 // MemManage Fault Address
+#define SCB_BFAR *(volatile uint32_t *)0xE000ED38 // BusFault Addreses Register
+#define SCB_AFSR *(volatile uint32_t *)0xE000ED3C // Auxilary Fault Status Register
#define SYST_CSR *(volatile uint32_t *)0xE000E010 // SysTick Control and Status
#define SYST_CSR_COUNTFLAG (uint32_t)0x00010000
extern void porte_isr(void);
extern void software_isr(void);
-#endif
-