+ uart_serial_setup();
+ printNL( NL "Bootloader DFU-Mode" );
+
+ // XXX REMOVEME
+ /*
+ GPIOB_PDDR |= (1<<16);
+ PORTB_PCR16 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOB_PSOR |= (1<<16);
+
+ // RST
+ GPIOC_PDDR |= (1<<8);
+ PORTC_PCR8 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOC_PSOR |= (1<<8);
+
+ // CS1B
+ GPIOC_PDDR |= (1<<4);
+ PORTC_PCR4 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOC_PCOR |= (1<<4);
+ */
+ // Backlight
+ /*
+ GPIOC_PDDR |= (1<<1);
+ PORTC_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOC_PCOR |= (1<<1);
+ GPIOC_PDDR |= (1<<2);
+ PORTC_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOC_PCOR |= (1<<2);
+ GPIOC_PDDR |= (1<<3);
+ PORTC_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+ GPIOC_PCOR |= (1<<3);
+ */
+
+ /*
+ // Read Firmware 1 Status
+ FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
+ FTFL.fccob.read_1s_block.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
+
+ int retval = ftfl_submit_cmd();
+ print("Firmware Erase Status: ");
+ printHex( retval );
+ print( NL );
+
+
+ // Read Bootloader 1 Status
+ FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
+ FTFL.fccob.read_1s_block.addr = (uintptr_t)&_bootloader;
+ FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
+
+ retval = ftfl_submit_cmd();
+ print("Bootloader Erase Status: ");
+ printHex( retval );
+ print( NL );
+ */
+
+ /*
+ // Program First Longword of firmware
+ FTFL.fccob.program_longword.fcmd = FTFL_FCMD_PROGRAM_LONGWORD;
+ FTFL.fccob.program_longword.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.program_longword.data_be[0] = 0x1;
+ FTFL.fccob.program_longword.data_be[1] = 0x2;
+ FTFL.fccob.program_longword.data_be[2] = 0x4;
+ FTFL.fccob.program_longword.data_be[3] = 0x8;
+ int retval = ftfl_submit_cmd();
+ print("Write Longword Status: ");
+ printHex( retval );
+ print( NL );
+ */
+
+ /*
+ // Erase Sector
+ FTFL.fccob.erase.fcmd = FTFL_FCMD_ERASE_SECTOR;
+ FTFL.fccob.erase.addr = (uintptr_t)&_app_rom;
+ int retval = ftfl_submit_cmd();
+ print("Erase Status: ");
+ printHex( retval );
+ print( NL );
+
+ // Prepare FlexRAM
+ FTFL.fccob.set_flexram.fcmd = FTFL_FCMD_SET_FLEXRAM;
+ FTFL.fccob.set_flexram.flexram_function = FTFL_FLEXRAM_RAM;
+ retval = ftfl_submit_cmd();
+ print("Set FlexRAM Status: ");
+ printHex( retval );
+ print( NL );
+
+ // Write to FlexRAM
+ memset( FlexRAM, 0xB4, 1000 );
+ memset( &FlexRAM[1000], 0xE3, 1000 );
+
+ // Program Sector
+ FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
+ FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.program_section.num_words = 128;
+ //FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
+ retval = ftfl_submit_cmd();
+ print("Program Sector1 Status: ");
+ printHex( retval );
+ print( NL );
+
+ FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
+ FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom + 0x400;
+ FTFL.fccob.program_section.num_words = 128;
+ //FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
+ retval = ftfl_submit_cmd();
+ print("Program Sector2 Status: ");
+ printHex( retval );
+ print( NL );
+
+ for ( uint8_t sector = 0; sector < 1; sector++ )
+ //sector_print( &_bootloader, sector, 16 );
+ sector_print( &_app_rom, sector, 16 );
+ print( NL );
+ */
+