-/*\r
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio\r
-\r
- Licensed under the Apache License, Version 2.0 (the "License");\r
- you may not use this file except in compliance with the License.\r
- You may obtain a copy of the License at\r
-\r
- http://www.apache.org/licenses/LICENSE-2.0\r
-\r
- Unless required by applicable law or agreed to in writing, software\r
- distributed under the License is distributed on an "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
- See the License for the specific language governing permissions and\r
- limitations under the License.\r
-*/\r
-\r
-#ifndef _MCUCONF_H_\r
-#define _MCUCONF_H_\r
-\r
-#define STM32F103_MCUCONF\r
-\r
-/*\r
- * STM32F103 drivers configuration.\r
- * The following settings override the default settings present in\r
- * the various device driver implementation headers.\r
- * Note that the settings for each driver only have effect if the whole\r
- * driver is enabled in halconf.h.\r
- *\r
- * IRQ priorities:\r
- * 15...0 Lowest...Highest.\r
- *\r
- * DMA priorities:\r
- * 0...3 Lowest...Highest.\r
- */\r
-\r
-/*\r
- * HAL driver system settings.\r
- */\r
-#define STM32_NO_INIT FALSE\r
-#define STM32_HSI_ENABLED TRUE\r
-#define STM32_LSI_ENABLED FALSE\r
-#define STM32_HSE_ENABLED TRUE\r
-#define STM32_LSE_ENABLED FALSE\r
-#define STM32_SW STM32_SW_PLL\r
-#define STM32_PLLSRC STM32_PLLSRC_HSE\r
-#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1\r
-#define STM32_PLLMUL_VALUE 9\r
-#define STM32_HPRE STM32_HPRE_DIV1\r
-#define STM32_PPRE1 STM32_PPRE1_DIV2\r
-#define STM32_PPRE2 STM32_PPRE2_DIV2\r
-#define STM32_ADCPRE STM32_ADCPRE_DIV4\r
-#define STM32_USB_CLOCK_REQUIRED TRUE\r
-#define STM32_USBPRE STM32_USBPRE_DIV1P5\r
-#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK\r
-#define STM32_RTCSEL STM32_RTCSEL_HSEDIV\r
-#define STM32_PVD_ENABLE FALSE\r
-#define STM32_PLS STM32_PLS_LEV0\r
-\r
-/*\r
- * ADC driver system settings.\r
- */\r
-#define STM32_ADC_USE_ADC1 FALSE\r
-#define STM32_ADC_ADC1_DMA_PRIORITY 2\r
-#define STM32_ADC_ADC1_IRQ_PRIORITY 6\r
-\r
-/*\r
- * CAN driver system settings.\r
- */\r
-#define STM32_CAN_USE_CAN1 FALSE\r
-#define STM32_CAN_CAN1_IRQ_PRIORITY 11\r
-\r
-/*\r
- * EXT driver system settings.\r
- */\r
-#define STM32_EXT_EXTI0_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI1_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI2_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI3_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI4_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI17_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI18_IRQ_PRIORITY 6\r
-#define STM32_EXT_EXTI19_IRQ_PRIORITY 6\r
-\r
-/*\r
- * GPT driver system settings.\r
- */\r
-#define STM32_GPT_USE_TIM1 FALSE\r
-#define STM32_GPT_USE_TIM2 FALSE\r
-#define STM32_GPT_USE_TIM3 FALSE\r
-#define STM32_GPT_USE_TIM4 FALSE\r
-#define STM32_GPT_USE_TIM5 FALSE\r
-#define STM32_GPT_USE_TIM8 FALSE\r
-#define STM32_GPT_TIM1_IRQ_PRIORITY 7\r
-#define STM32_GPT_TIM2_IRQ_PRIORITY 7\r
-#define STM32_GPT_TIM3_IRQ_PRIORITY 7\r
-#define STM32_GPT_TIM4_IRQ_PRIORITY 7\r
-#define STM32_GPT_TIM5_IRQ_PRIORITY 7\r
-#define STM32_GPT_TIM8_IRQ_PRIORITY 7\r
-\r
-/*\r
- * I2C driver system settings.\r
- */\r
-#define STM32_I2C_USE_I2C1 FALSE\r
-#define STM32_I2C_USE_I2C2 FALSE\r
-#define STM32_I2C_BUSY_TIMEOUT 50\r
-#define STM32_I2C_I2C1_IRQ_PRIORITY 5\r
-#define STM32_I2C_I2C2_IRQ_PRIORITY 5\r
-#define STM32_I2C_I2C1_DMA_PRIORITY 3\r
-#define STM32_I2C_I2C2_DMA_PRIORITY 3\r
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")\r
-\r
-/*\r
- * ICU driver system settings.\r
- */\r
-#define STM32_ICU_USE_TIM1 FALSE\r
-#define STM32_ICU_USE_TIM2 FALSE\r
-#define STM32_ICU_USE_TIM3 FALSE\r
-#define STM32_ICU_USE_TIM4 FALSE\r
-#define STM32_ICU_USE_TIM5 FALSE\r
-#define STM32_ICU_USE_TIM8 FALSE\r
-#define STM32_ICU_TIM1_IRQ_PRIORITY 7\r
-#define STM32_ICU_TIM2_IRQ_PRIORITY 7\r
-#define STM32_ICU_TIM3_IRQ_PRIORITY 7\r
-#define STM32_ICU_TIM4_IRQ_PRIORITY 7\r
-#define STM32_ICU_TIM5_IRQ_PRIORITY 7\r
-#define STM32_ICU_TIM8_IRQ_PRIORITY 7\r
-\r
-/*\r
- * PWM driver system settings.\r
- */\r
-#define STM32_PWM_USE_ADVANCED FALSE\r
-#define STM32_PWM_USE_TIM1 FALSE\r
-#define STM32_PWM_USE_TIM2 FALSE\r
-#define STM32_PWM_USE_TIM3 FALSE\r
-#define STM32_PWM_USE_TIM4 FALSE\r
-#define STM32_PWM_USE_TIM5 FALSE\r
-#define STM32_PWM_USE_TIM8 FALSE\r
-#define STM32_PWM_TIM1_IRQ_PRIORITY 7\r
-#define STM32_PWM_TIM2_IRQ_PRIORITY 7\r
-#define STM32_PWM_TIM3_IRQ_PRIORITY 7\r
-#define STM32_PWM_TIM4_IRQ_PRIORITY 7\r
-#define STM32_PWM_TIM5_IRQ_PRIORITY 7\r
-#define STM32_PWM_TIM8_IRQ_PRIORITY 7\r
-\r
-/*\r
- * RTC driver system settings.\r
- */\r
-#define STM32_RTC_IRQ_PRIORITY 15\r
-\r
-/*\r
- * SERIAL driver system settings.\r
- */\r
-#define STM32_SERIAL_USE_USART1 FALSE\r
-#define STM32_SERIAL_USE_USART2 FALSE\r
-#define STM32_SERIAL_USE_USART3 FALSE\r
-#define STM32_SERIAL_USE_UART4 FALSE\r
-#define STM32_SERIAL_USE_UART5 FALSE\r
-#define STM32_SERIAL_USART1_PRIORITY 12\r
-#define STM32_SERIAL_USART2_PRIORITY 12\r
-#define STM32_SERIAL_USART3_PRIORITY 12\r
-#define STM32_SERIAL_UART4_PRIORITY 12\r
-#define STM32_SERIAL_UART5_PRIORITY 12\r
-\r
-/*\r
- * SPI driver system settings.\r
- */\r
-#define STM32_SPI_USE_SPI1 FALSE\r
-#define STM32_SPI_USE_SPI2 FALSE\r
-#define STM32_SPI_USE_SPI3 FALSE\r
-#define STM32_SPI_SPI1_DMA_PRIORITY 1\r
-#define STM32_SPI_SPI2_DMA_PRIORITY 1\r
-#define STM32_SPI_SPI3_DMA_PRIORITY 1\r
-#define STM32_SPI_SPI1_IRQ_PRIORITY 10\r
-#define STM32_SPI_SPI2_IRQ_PRIORITY 10\r
-#define STM32_SPI_SPI3_IRQ_PRIORITY 10\r
-#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")\r
-\r
-/*\r
- * ST driver system settings.\r
- */\r
-#define STM32_ST_IRQ_PRIORITY 8\r
-#define STM32_ST_USE_TIMER 2\r
-\r
-/*\r
- * UART driver system settings.\r
- */\r
-#define STM32_UART_USE_USART1 FALSE\r
-#define STM32_UART_USE_USART2 FALSE\r
-#define STM32_UART_USE_USART3 FALSE\r
-#define STM32_UART_USART1_IRQ_PRIORITY 12\r
-#define STM32_UART_USART2_IRQ_PRIORITY 12\r
-#define STM32_UART_USART3_IRQ_PRIORITY 12\r
-#define STM32_UART_USART1_DMA_PRIORITY 0\r
-#define STM32_UART_USART2_DMA_PRIORITY 0\r
-#define STM32_UART_USART3_DMA_PRIORITY 0\r
-#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")\r
-\r
-/*\r
- * USB driver system settings.\r
- */\r
-#define STM32_USB_USE_USB1 TRUE\r
-#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE\r
-#define STM32_USB_USB1_HP_IRQ_PRIORITY 13\r
-#define STM32_USB_USB1_LP_IRQ_PRIORITY 14\r
-\r
-#endif /* _MCUCONF_H_ */\r
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define STM32F103_MCUCONF
+
+/*
+ * STM32F103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_HSI_ENABLED TRUE
+#define STM32_LSI_ENABLED FALSE
+#define STM32_HSE_ENABLED TRUE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED TRUE
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC1_IRQ_PRIORITY 6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
+#define STM32_I2C_I2C2_IRQ_PRIORITY 5
+#define STM32_I2C_I2C1_DMA_PRIORITY 3
+#define STM32_I2C_I2C2_DMA_PRIORITY 3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 FALSE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY 15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+
+#endif /* _MCUCONF_H_ */
projects / qmk_firmware.git / blobdiff