Add missing links to features page and sidebar section (#5949)

[qmk_firmware.git] / drivers / arm / i2c_master.h

diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index 392760328f784f5540356f990b9c1879f48752cd..1bb74c800f6cff5937ed76e8edfdab8cf6c9afbe 100644 (file)
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -26,15 +26,67 @@
 #include "ch.h"
 #include <hal.h>
 
+#ifdef I2C1_BANK
+    #define I2C1_SCL_BANK I2C1_BANK
+    #define I2C1_SDA_BANK I2C1_BANK
+#endif
+
+#ifndef I2C1_SCL_BANK
+    #define I2C1_SCL_BANK GPIOB
+#endif
+
+#ifndef I2C1_SDA_BANK
+    #define I2C1_SDA_BANK GPIOB
+#endif
+
+#ifndef I2C1_SCL
+    #define I2C1_SCL 6
+#endif
+#ifndef I2C1_SDA
+    #define I2C1_SDA 7
+#endif
+
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+#ifndef I2C1_SCL_PAL_MODE
+    #define I2C1_SCL_PAL_MODE 4
+#endif
+#ifndef I2C1_SDA_PAL_MODE
+    #define I2C1_SDA_PAL_MODE 4
+#endif
+
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+#ifndef I2C1_TIMINGR_PRESC
+    #define I2C1_TIMINGR_PRESC 15U
+#endif
+#ifndef I2C1_TIMINGR_SCLDEL
+    #define I2C1_TIMINGR_SCLDEL 4U
+#endif
+#ifndef I2C1_TIMINGR_SDADEL
+    #define I2C1_TIMINGR_SDADEL 2U
+#endif
+#ifndef I2C1_TIMINGR_SCLH
+    #define I2C1_TIMINGR_SCLH 15U
+#endif
+#ifndef I2C1_TIMINGR_SCLL
+    #define I2C1_TIMINGR_SCLL 21U
+#endif
+
 #ifndef I2C_DRIVER
   #define I2C_DRIVER I2CD1
 #endif
 
+typedef int16_t i2c_status_t;
+
+#define I2C_STATUS_SUCCESS (0)
+#define I2C_STATUS_ERROR   (-1)
+#define I2C_STATUS_TIMEOUT (-2)
+
 void i2c_init(void);
-uint8_t i2c_start(uint8_t address);
-uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
-uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
-uint8_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length);
-uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
-uint8_t i2c_readReg(uint8_t devaddr, uint8_t* regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
-uint8_t i2c_stop(uint16_t timeout);
+i2c_status_t i2c_start(uint8_t address);
+i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length);
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t* regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
+void i2c_stop(void);