Parameterise STM32 I2C pin modes and timing parameters. (#5671)

[qmk_firmware.git] / drivers / arm / i2c_master.h

diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index a15f1702dd30bdc945b82c89af5a9c7b393dd674..1bb74c800f6cff5937ed76e8edfdab8cf6c9afbe 100644 (file)
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -26,9 +26,19 @@
 #include "ch.h"
 #include <hal.h>
 
-#ifndef I2C1_BANK
-    #define I2C1_BANK GPIOB
+#ifdef I2C1_BANK
+    #define I2C1_SCL_BANK I2C1_BANK
+    #define I2C1_SDA_BANK I2C1_BANK
 #endif
+
+#ifndef I2C1_SCL_BANK
+    #define I2C1_SCL_BANK GPIOB
+#endif
+
+#ifndef I2C1_SDA_BANK
+    #define I2C1_SDA_BANK GPIOB
+#endif
+
 #ifndef I2C1_SCL
     #define I2C1_SCL 6
 #endif
@@ -36,6 +46,32 @@
     #define I2C1_SDA 7
 #endif
 
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+#ifndef I2C1_SCL_PAL_MODE
+    #define I2C1_SCL_PAL_MODE 4
+#endif
+#ifndef I2C1_SDA_PAL_MODE
+    #define I2C1_SDA_PAL_MODE 4
+#endif
+
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+#ifndef I2C1_TIMINGR_PRESC
+    #define I2C1_TIMINGR_PRESC 15U
+#endif
+#ifndef I2C1_TIMINGR_SCLDEL
+    #define I2C1_TIMINGR_SCLDEL 4U
+#endif
+#ifndef I2C1_TIMINGR_SDADEL
+    #define I2C1_TIMINGR_SDADEL 2U
+#endif
+#ifndef I2C1_TIMINGR_SCLH
+    #define I2C1_TIMINGR_SCLH 15U
+#endif
+#ifndef I2C1_TIMINGR_SCLL
+    #define I2C1_TIMINGR_SCLL 21U
+#endif
+
 #ifndef I2C_DRIVER
   #define I2C_DRIVER I2CD1
 #endif