]> git.donarmstrong.com Git - qmk_firmware.git/blobdiff - drivers/arm/i2c_master.c
Align ARM i2c_readReg with AVR (#6314)
[qmk_firmware.git] / drivers / arm / i2c_master.c
index 5814375f371fabf7883fb02e4f16412f7b1eb8b9..cba5a1c679f3fa07f65ce3022d9db3714013b6df 100644 (file)
 static uint8_t i2c_address;
 
 static const I2CConfig i2cconfig = {
+#ifdef USE_I2CV1
+  I2C1_OPMODE,
+  I2C1_CLOCK_SPEED,
+  I2C1_DUTY_CYCLE,
+#else
   STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) |
   STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) |
   STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH)  | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL),
   0,
   0
+#endif
 };
 
 static i2c_status_t chibios_to_qmk(const msg_t* status) {
@@ -61,8 +67,13 @@ void i2c_init(void)
 
   chThdSleepMilliseconds(10);
 
+#ifdef USE_I2CV1
+  palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+  palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+#else
   palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
   palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
+#endif
 
   //i2cInit(); //This is invoked by halInit() so no need to redo it.
 }
@@ -106,11 +117,11 @@ i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data,
   return chibios_to_qmk(&status);
 }
 
-i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t* regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
 {
   i2c_address = devaddr;
   i2cStart(&I2C_DRIVER, &i2cconfig);
-  msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), regaddr, 1, data, length, MS2ST(timeout));
+  msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, MS2ST(timeout));
   return chibios_to_qmk(&status);
 }