// http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4507.pdf
// http://cache.freescale.com/files/32bit/doc/ref_manual/K20P64M72SF1RM.pdf (28.34.6)
//
- 0xFF, 0xFF, 0xFF, 0xFE, // Program Flash Protection Bytes FPROT0-3
+ 0xFF, 0xFF, 0xFF, 0xFF, // Program Flash Protection Bytes FPROT0-3 // XXX TODO PROTECT
0xBE, // Flash security byte FSEC
0x03, // Flash nonvolatile option byte FOPT
0xFF, // EEPROM Protection Byte FEPROT
0xFF, // Data Flash Protection Byte FDPROT
+};
#endif
__attribute__((noreturn))
static inline void jump_to_app( uintptr_t addr )
{
- // addr is in r0
- __asm__("ldr sp, [%[addr], #0]\n"
- "ldr pc, [%[addr], #4]"
- :: [addr] "r" (addr));
- // NOTREACHED
- __builtin_unreachable();
+ // addr is in r0
+ __asm__("ldr sp, [%[addr], #0]\n"
+ "ldr pc, [%[addr], #4]"
+ :: [addr] "r" (addr));
+ // NOTREACHED
+ __builtin_unreachable();
}
#endif
//
// Also checking for ARM lock-up signal (invalid firmware image)
// RCM_SRS1 & 0x02
- if ( RCM_SRS0 & 0x40 || RCM_SRS0 & 0x20 || RCM_SRS1 & 0x02 || _app_rom == 0xffffffff ||
- memcmp( (uint8_t*)&VBAT, sys_reset_to_loader_magic, sizeof(sys_reset_to_loader_magic) ) == 0 ) // Check for soft reload
+ if ( // PIN (External Reset Pin/Switch)
+ RCM_SRS0 & 0x40
+ // WDOG (Watchdog timeout)
+ || RCM_SRS0 & 0x20
+ // LOCKUP (ARM Core LOCKUP event)
+ || RCM_SRS1 & 0x02
+ // Blank flash check
+ || _app_rom == 0xffffffff
+ // Software reset
+ || memcmp( (uint8_t*)&VBAT, sys_reset_to_loader_magic, sizeof(sys_reset_to_loader_magic) ) == 0
+ )
{
memset( (uint8_t*)&VBAT, 0, sizeof(VBAT) );
}
NVIC_SET_PRIORITY( i, 128 );
}
- // FLL at 48MHz
+ // FLL at 48MHz
MCG_C4 = MCG_C4_DMX32 | MCG_C4_DRST_DRS( 1 );
// USB Clock and FLL select
// Teensy 3.0 and 3.1 and Kiibohd-dfu (mk20dx256vlh7)
#else
- SCB_VTOR = 0; // use vector table in flash
+ SCB_VTOR = 0; // use vector table in flash
// default all interrupts to medium priority level
for ( unsigned int i = 0; i < NVIC_NUM_INTERRUPTS; i++ )