#include "mchck.h"
#include "dfu.desc.h"
+#include "debug.h"
+
// ----- Variables -----
/**
* Unfortunately we can't DMA directly to FlexRAM, so we'll have to stage here.
*/
-static char staging[ FLASH_SECTOR_SIZE ];
+static char staging[ USB_DFU_TRANSFER_SIZE ];
// ----- Functions -----
+int sector_print( void* buf, size_t sector, size_t chunks )
+{
+ uint8_t* start = (uint8_t*)buf + sector * USB_DFU_TRANSFER_SIZE;
+ uint8_t* end = (uint8_t*)buf + (sector + 1) * USB_DFU_TRANSFER_SIZE;
+ uint8_t* pos = start;
+
+ // Verify if sector erased
+ FTFL.fccob.read_1s_section.fcmd = FTFL_FCMD_READ_1s_SECTION;
+ FTFL.fccob.read_1s_section.addr = (uintptr_t)start;
+ FTFL.fccob.read_1s_section.margin = FTFL_MARGIN_NORMAL;
+ FTFL.fccob.read_1s_section.num_words = 250; // 2000 kB / 64 bits
+ int retval = ftfl_submit_cmd();
+
+ print( NL );
+ print("Block ");
+ printHex( sector );
+ print(" ");
+ printHex( (size_t)start );
+ print(" -> ");
+ printHex( (size_t)end );
+ print(" Erased: ");
+ printHex( retval );
+ print( NL );
+
+ // Display sector
+ for ( size_t line = 0; pos < end - 24; line++ )
+ {
+ // Each Line
+ printHex_op( (size_t)pos, 4 );
+ print(": ");
+
+ // Each 2 byte chunk
+ for ( size_t chunk = 0; chunk < chunks; chunk++ )
+ {
+ // Print out the two bytes (second one first)
+ printHex_op( *(pos + 1), 2 );
+ printHex_op( *pos, 2 );
+ print(" ");
+ pos += 2;
+ }
+
+ print( NL );
+ }
+
+ return retval;
+}
+
+static enum dfu_status setup_read( size_t off, size_t *len, void **buf )
+{
+ // Calculate starting address from offset
+ *buf = (void*)&_app_rom + (USB_DFU_TRANSFER_SIZE / 4) * off;
+
+ // Calculate length of transfer
+ /*
+ *len = *buf > (void*)(&_app_rom_end) - USB_DFU_TRANSFER_SIZE
+ ? 0 : USB_DFU_TRANSFER_SIZE;
+ */
+
+ // Check for error
+ /*
+ if ( *buf > (void*)&_app_rom_end )
+ return (DFU_STATUS_errADDRESS);
+ */
+
+ return (DFU_STATUS_OK);
+}
+
static enum dfu_status setup_write( size_t off, size_t len, void **buf )
{
- GPIOA_PCOR |= (1<<5);
static int last = 0;
if ( len > sizeof(staging) )
void init_usb_bootloader( int config )
{
- dfu_init(setup_write, finish_write, &dfu_ctx);
+ dfu_init( setup_read, setup_write, finish_write, &dfu_ctx );
}
void main()
#error "Incompatible chip for bootloader"
#endif
- //for (uint8_t c = 0; c < 20; c++)
- /*
- while( 1 )
- {
- GPIOA_PTOR |= (1<<5);
- for (uint32_t d = 0; d < 7200000; d++ );
- }
- */
+ uart_serial_setup();
+ printNL( NL "Bootloader DFU-Mode" );
// XXX REMOVEME
/*
GPIOB_PDDR |= (1<<16);
PORTB_PCR16 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
GPIOB_PSOR |= (1<<16);
- */
+
// RST
GPIOC_PDDR |= (1<<8);
PORTC_PCR8 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
GPIOC_PSOR |= (1<<8);
- /*
+
// CS1B
GPIOC_PDDR |= (1<<4);
PORTC_PCR4 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
GPIOC_PCOR |= (1<<4);
*/
// Backlight
+ /*
GPIOC_PDDR |= (1<<1);
PORTC_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
GPIOC_PCOR |= (1<<1);
GPIOC_PDDR |= (1<<3);
PORTC_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
GPIOC_PCOR |= (1<<3);
+ */
+
+ /*
+ // Read Firmware 1 Status
+ FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
+ FTFL.fccob.read_1s_block.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
+
+ int retval = ftfl_submit_cmd();
+ print("Firmware Erase Status: ");
+ printHex( retval );
+ print( NL );
+
+
+ // Read Bootloader 1 Status
+ FTFL.fccob.read_1s_block.fcmd = FTFL_FCMD_READ_1s_BLOCK;
+ FTFL.fccob.read_1s_block.addr = (uintptr_t)&_bootloader;
+ FTFL.fccob.read_1s_block.margin = FTFL_MARGIN_NORMAL;
+
+ retval = ftfl_submit_cmd();
+ print("Bootloader Erase Status: ");
+ printHex( retval );
+ print( NL );
+ */
+ /*
+ // Program First Longword of firmware
+ FTFL.fccob.program_longword.fcmd = FTFL_FCMD_PROGRAM_LONGWORD;
+ FTFL.fccob.program_longword.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.program_longword.data_be[0] = 0x1;
+ FTFL.fccob.program_longword.data_be[1] = 0x2;
+ FTFL.fccob.program_longword.data_be[2] = 0x4;
+ FTFL.fccob.program_longword.data_be[3] = 0x8;
+ int retval = ftfl_submit_cmd();
+ print("Write Longword Status: ");
+ printHex( retval );
+ print( NL );
+ */
+ /*
+ // Erase Sector
+ FTFL.fccob.erase.fcmd = FTFL_FCMD_ERASE_SECTOR;
+ FTFL.fccob.erase.addr = (uintptr_t)&_app_rom;
+ int retval = ftfl_submit_cmd();
+ print("Erase Status: ");
+ printHex( retval );
+ print( NL );
+
+ // Prepare FlexRAM
+ FTFL.fccob.set_flexram.fcmd = FTFL_FCMD_SET_FLEXRAM;
+ FTFL.fccob.set_flexram.flexram_function = FTFL_FLEXRAM_RAM;
+ retval = ftfl_submit_cmd();
+ print("Set FlexRAM Status: ");
+ printHex( retval );
+ print( NL );
+
+ // Write to FlexRAM
+ memset( FlexRAM, 0xB4, 1000 );
+ memset( &FlexRAM[1000], 0xE3, 1000 );
+
+ // Program Sector
+ FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
+ FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom;
+ FTFL.fccob.program_section.num_words = 128;
+ //FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
+ retval = ftfl_submit_cmd();
+ print("Program Sector1 Status: ");
+ printHex( retval );
+ print( NL );
+
+ FTFL.fccob.program_section.fcmd = FTFL_FCMD_PROGRAM_SECTION;
+ FTFL.fccob.program_section.addr = (uintptr_t)&_app_rom + 0x400;
+ FTFL.fccob.program_section.num_words = 128;
+ //FTFL.fccob.program_section.num_words = 250; // 2000 kb / 64 bits
+ retval = ftfl_submit_cmd();
+ print("Program Sector2 Status: ");
+ printHex( retval );
+ print( NL );
+
+ for ( uint8_t sector = 0; sector < 1; sector++ )
+ //sector_print( &_bootloader, sector, 16 );
+ sector_print( &_app_rom, sector, 16 );
+ print( NL );
+ */
flash_prepare_flashing();
- uint32_t *position = &_app_rom;
+ //uint32_t *position = &_app_rom;
usb_init( &dfu_device );
+
for (;;)
{
usb_poll();
-
- /*
- for ( ; position < &_app_rom + 0x201; position++ )
- //for ( ; position < &_app_rom + 0x800; position++ )
- {
- if ( *position != 0xFFFFFFFF )
- {
- while( 1 )
- {
- GPIOA_PTOR |= (1<<5);
- for (uint32_t d = 0; d < 7200000; d++ );
- }
- }
- }
- */
-
}
}