#define UART_S2_RXINV (uint8_t)0x10 // RX Line Inversion Enable
#define UART_S2_MSBF (uint8_t)0x20 // MSBF Format Enabled
#define UART0_C3 *(volatile uint8_t *)0x4006A006 // UART Control Register 3
-#define UART_S2_TXINV (uint8_t)0x10 // TX Line Inversion Enable
+#define UART_C3_TXINV (uint8_t)0x10 // TX Line Inversion Enable
#define UART0_D *(volatile uint8_t *)0x4006A007 // UART Data Register
#define UART0_MA1 *(volatile uint8_t *)0x4006A008 // UART Match Address Registers 1
#define UART0_MA2 *(volatile uint8_t *)0x4006A009 // UART Match Address Registers 2