1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
22 static const SWM_Map SWM_I2C_SDA[] = {
26 static const SWM_Map SWM_I2C_SCL[] = {
30 static uint8_t repeated_start = 0;
32 #define I2C_DAT(x) (x->i2c->MSTDAT)
33 #define I2C_STAT(x) ((x->i2c->STAT >> 1) & (0x07))
35 static inline int i2c_status(i2c_t *obj) {
39 // Wait until the Serial Interrupt (SI) is set
40 static int i2c_wait_SI(i2c_t *obj) {
42 while (!(obj->i2c->STAT & (1 << 0))) {
44 if (timeout > 100000) return -1;
49 static inline void i2c_interface_enable(i2c_t *obj) {
50 obj->i2c->CFG |= (1 << 0);
53 static inline void i2c_power_enable(i2c_t *obj) {
54 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
55 LPC_SYSCON->PRESETCTRL &= ~(0x1<<6);
56 LPC_SYSCON->PRESETCTRL |= (0x1<<6);
59 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
60 obj->i2c = (LPC_I2C_TypeDef *)LPC_I2C;
65 swm = &SWM_I2C_SDA[0];
66 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
67 LPC_SWM->PINASSIGN[swm->n] = regVal | (sda << swm->offset);
69 swm = &SWM_I2C_SCL[0];
70 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
71 LPC_SWM->PINASSIGN[swm->n] = regVal | (scl << swm->offset);
74 i2c_power_enable(obj);
75 // set default frequency at 100k
76 i2c_frequency(obj, 100000);
77 i2c_interface_enable(obj);
80 //Actually Wrong. Spec says: First store Address in DAT before setting STA !
81 //Undefined state when using single byte I2C operations and too much delay
82 //between i2c_start and do_i2c_write(Address).
83 //Also note that lpc812 will immediately continue reading a byte when Address b0 == 1
84 inline int i2c_start(i2c_t *obj) {
87 obj->i2c->MSTCTL = (1 << 1) | (1 << 0);
90 obj->i2c->MSTCTL = (1 << 1);
95 //Generate Stop condition and wait until bus is Idle
96 //Will also send NAK for previous RD
97 inline int i2c_stop(i2c_t *obj) {
100 obj->i2c->MSTCTL = (1 << 2) | (1 << 0); // STP bit and Continue bit. Sends NAK to complete previous RD
102 //Spin until Ready (b0 == 1)and Status is Idle (b3..b1 == 000)
103 while ((obj->i2c->STAT & ((7 << 1) | (1 << 0))) != ((0 << 1) | (1 << 0))) {
105 if (timeout > 100000) return 1;
111 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
113 I2C_DAT(obj) = value;
116 obj->i2c->MSTCTL = (1 << 0);
118 // wait and return status
120 return i2c_status(obj);
123 static inline int i2c_do_read(i2c_t *obj, int last) {
124 // wait for it to arrive
127 obj->i2c->MSTCTL = (1 << 0);
130 return (I2C_DAT(obj) & 0xFF);
133 void i2c_frequency(i2c_t *obj, int hz) {
134 // No peripheral clock divider on the M0
135 uint32_t PCLK = SystemCoreClock;
137 uint32_t clkdiv = PCLK / (hz * 4) - 1;
139 obj->i2c->DIV = clkdiv;
140 obj->i2c->MSTTIME = 0;
143 // The I2C does a read or a write as a whole operation
144 // There are two types of error conditions it can encounter
145 // 1) it can not obtain the bus
146 // 2) it gets error responses at part of the transmission
148 // We tackle them as follows:
149 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
150 // which basically turns it in to a 2)
151 // 2) on error, we use the standard error mechanisms to report/debug
153 // Therefore an I2C transaction should always complete. If it doesn't it is usually
154 // because something is setup wrong (e.g. wiring), and we don't need to programatically
157 //New version WH, Tested OK for Start and Repeated Start
158 //Old version was Wrong: Calls i2c_start without setting address, i2c_do_read continues before checking status, status check for wrong value
159 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
162 //Store the address+RD and then generate STA
163 I2C_DAT(obj) = address | 0x01;
166 // Wait for completion of STA and Sending of SlaveAddress+RD and first Read byte
168 status = i2c_status(obj);
169 if (status == 0x03) { // NAK on SlaveAddress
171 return I2C_ERROR_NO_SLAVE;
174 // Read in all except last byte
175 for (count = 0; count < (length-1); count++) {
177 // Wait for it to arrive, note that first byte read after address+RD is already waiting
179 status = i2c_status(obj);
180 if (status != 0x01) { // RX RDY
184 data[count] = I2C_DAT(obj) & 0xFF; // Store read byte
186 obj->i2c->MSTCTL = (1 << 0); // Send ACK and Continue to read
190 // Wait for it to arrive
193 status = i2c_status(obj);
194 if (status != 0x01) { // RX RDY
198 data[count] = I2C_DAT(obj) & 0xFF; // Store final read byte
200 // If not repeated start, send stop.
202 i2c_stop(obj); // Also sends NAK for last read byte
212 //New version WH, Tested OK for Start and Repeated Start
213 //Old version was Wrong: Calls i2c_start without setting address first
214 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
217 //Store the address+/WR and then generate STA
218 I2C_DAT(obj) = address & 0xFE;
221 // Wait for completion of STA and Sending of SlaveAddress+/WR
223 status = i2c_status(obj);
224 if (status == 0x03) { // NAK SlaveAddress
226 return I2C_ERROR_NO_SLAVE;
230 for (i=0; i<length; i++) {
231 status = i2c_do_write(obj, data[i], 0);
232 if (status != 0x02) { // TX RDY. Handles a Slave NAK on datawrite
238 // If not repeated start, send stop.
250 void i2c_reset(i2c_t *obj) {
254 int i2c_byte_read(i2c_t *obj, int last) {
255 return (i2c_do_read(obj, last) & 0xFF);
258 int i2c_byte_write(i2c_t *obj, int data) {
260 int status = i2c_do_write(obj, (data & 0xFF), 0);
276 #define I2C_SLVDAT(x) (x->i2c->SLVDAT)
277 #define I2C_SLVSTAT(x) ((x->i2c->STAT >> 9) & (0x03))
278 #define I2C_SLVSI(x) ((x->i2c->STAT >> 8) & (0x01))
279 //#define I2C_SLVCNT(x) (x->i2c->SLVCTL = (1 << 0))
280 //#define I2C_SLVNAK(x) (x->i2c->SLVCTL = (1 << 1))
283 // Wait until the Slave Serial Interrupt (SI) is set
284 // Timeout when it takes too long.
285 static int i2c_wait_slave_SI(i2c_t *obj) {
287 while (!(obj->i2c->STAT & (1 << 8))) {
289 if (timeout > 100000) return -1;
295 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
298 // obj->i2c->CFG &= ~(1 << 0); //Disable Master mode
299 obj->i2c->CFG |= (1 << 1); //Enable Slave mode
302 // obj->i2c->CFG |= (1 << 0); //Enable Master mode
303 obj->i2c->CFG &= ~(1 << 1); //Disable Slave mode
307 // Wait for next I2C event and find out what is going on
309 int i2c_slave_receive(i2c_t *obj) {
312 // Check if there is any data pending
313 if (! I2C_SLVSI(obj)) {
318 switch(I2C_SLVSTAT(obj)) {
319 case 0x0: // Slave address plus R/W received
320 // At least one of the four slave addresses has been matched by hardware.
321 // You can figure out which address by checking Slave address match Index in STAT register.
323 // Get the received address
324 addr = I2C_SLVDAT(obj) & 0xFF;
325 // Send ACK on address and Continue
326 obj->i2c->SLVCTL = (1 << 0);
329 return 2; //WriteGeneral
332 if ((addr & 0x01) == 0x01) {
333 return 1; //ReadAddressed
336 return 3; //WriteAddressed
340 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
341 // Oops, should never get here...
342 obj->i2c->SLVCTL = (1 << 1); // Send NACK on received data, try to recover...
345 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
346 // Oops, should never get here...
347 I2C_SLVDAT(obj) = 0xFF; // Send dummy data for transmission
348 obj->i2c->SLVCTL = (1 << 0); // Continue and try to recover...
351 case 0x3: // Reserved.
352 default: // Oops, should never get here...
353 obj->i2c->SLVCTL = (1 << 0); // Continue and try to recover...
359 // The dedicated I2C Slave byte read and byte write functions need to be called
360 // from 'common' mbed I2CSlave API for devices that have separate Master and
361 // Slave engines such as the lpc812 and lpc1549.
363 //Called when Slave is addressed for Write, Slave will receive Data in polling mode
364 //Parameter last=1 means received byte will be NACKed.
365 int i2c_slave_byte_read(i2c_t *obj, int last) {
369 while (!I2C_SLVSI(obj)); // Wait forever
370 //if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
372 // Dont bother to check State, were not returning it anyhow..
373 //if (I2C_SLVSTAT(obj)) == 0x01) {
374 // Slave receive. Received data is available (Slave Receiver mode).
377 data = I2C_SLVDAT(obj) & 0xFF; // Get and store the received data
379 obj->i2c->SLVCTL = (1 << 1); // Send NACK on received data and Continue
382 obj->i2c->SLVCTL = (1 << 0); // Send ACK on data and Continue to read
389 //Called when Slave is addressed for Read, Slave will send Data in polling mode
391 int i2c_slave_byte_write(i2c_t *obj, int data) {
394 while (!I2C_SLVSI(obj)); // Wait forever
395 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
398 switch(I2C_SLVSTAT(obj)) {
399 case 0x0: // Slave address plus R/W received
400 // At least one of the four slave addresses has been matched by hardware.
401 // You can figure out which address by checking Slave address match Index in STAT register.
402 // I2C Restart occurred
405 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
406 // Should not get here...
409 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
410 I2C_SLVDAT(obj) = data & 0xFF; // Store the data for transmission
411 obj->i2c->SLVCTL = (1 << 0); // Continue to send
415 case 0x3: // Reserved.
417 // Should not get here...
424 //Called when Slave is addressed for Write, Slave will receive Data in polling mode
425 //Parameter length (>=1) is the maximum allowable number of bytes. All bytes will be ACKed.
426 int i2c_slave_read(i2c_t *obj, char *data, int length) {
429 // Read and ACK all expected bytes
430 while (count < length) {
432 while (!I2C_SLVSI(obj)); // Wait forever
433 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
436 switch(I2C_SLVSTAT(obj)) {
437 case 0x0: // Slave address plus R/W received
438 // At least one of the four slave addresses has been matched by hardware.
439 // You can figure out which address by checking Slave address match Index in STAT register.
440 // I2C Restart occurred
444 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
445 data[count] = I2C_SLVDAT(obj) & 0xFF; // Get and store the received data
446 obj->i2c->SLVCTL = (1 << 0); // Send ACK on data and Continue to read
449 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
450 case 0x3: // Reserved.
451 default: // Should never get here...
459 return count; // Received the expected number of bytes
463 //Called when Slave is addressed for Read, Slave will send Data in polling mode
464 //Parameter length (>=1) is the maximum number of bytes. Exit when Slave byte is NACKed.
465 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
468 // Send and all bytes or Exit on NAK
469 for (count=0; count < length; count++) {
470 // Wait until Ready for data
471 while (!I2C_SLVSI(obj)); // Wait forever
472 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
475 switch(I2C_SLVSTAT(obj)) {
476 case 0x0: // Slave address plus R/W received
477 // At least one of the four slave addresses has been matched by hardware.
478 // You can figure out which address by checking Slave address match Index in STAT register.
479 // I2C Restart occurred
482 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
483 // Should not get here...
486 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
487 I2C_SLVDAT(obj) = data[count] & 0xFF; // Store the data for transmission
488 obj->i2c->SLVCTL = (1 << 0); // Continue to send
490 case 0x3: // Reserved.
492 // Should not get here...
498 return length; // Transmitted the max number of bytes
502 // Set the four slave addresses.
503 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
504 obj->i2c->SLVADR0 = (address & 0xFE); // Store address in address 0 register
505 obj->i2c->SLVADR1 = (0x00 & 0xFE); // Store general call write address in address 1 register
506 obj->i2c->SLVADR2 = (0x01); // Disable address 2 register
507 obj->i2c->SLVADR3 = (0x01); // Disable address 3 register
508 obj->i2c->SLVQUAL0 = (mask & 0xFE); // Qualifier mask for address 0 register. Any maskbit that is 1 will always be a match