1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
21 #include "mbed_error.h"
23 // SCU mode for I2C SCL/SDA pins
24 #define SCU_PINIO_I2C SCU_PINIO_PULLNONE
26 static const PinMap PinMap_I2C_SDA[] = {
28 {P2_3, I2C_1, (SCU_PINIO_I2C | 1)},
29 {PE_13, I2C_1, (SCU_PINIO_I2C | 2)},
33 static const PinMap PinMap_I2C_SCL[] = {
35 {P2_4, I2C_1, (SCU_PINIO_I2C | 1)},
36 {PE_14, I2C_1, (SCU_PINIO_I2C | 2)},
40 #define I2C_CONSET(x) (x->i2c->CONSET)
41 #define I2C_CONCLR(x) (x->i2c->CONCLR)
42 #define I2C_STAT(x) (x->i2c->STAT)
43 #define I2C_DAT(x) (x->i2c->DAT)
44 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
45 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
47 static const uint32_t I2C_addr_offset[2][4] = {
48 {0x0C, 0x20, 0x24, 0x28},
49 {0x30, 0x34, 0x38, 0x3C}
52 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
53 I2C_CONCLR(obj) = (start << 5)
59 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
60 I2C_CONSET(obj) = (start << 5)
66 // Clear the Serial Interrupt (SI)
67 static inline void i2c_clear_SI(i2c_t *obj) {
68 i2c_conclr(obj, 0, 0, 1, 0);
71 static inline int i2c_status(i2c_t *obj) {
75 // Wait until the Serial Interrupt (SI) is set
76 static int i2c_wait_SI(i2c_t *obj) {
78 while (!(I2C_CONSET(obj) & (1 << 3))) {
80 if (timeout > 100000) return -1;
85 static inline void i2c_interface_enable(i2c_t *obj) {
86 I2C_CONSET(obj) = 0x40;
89 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
90 // determine the SPI to use
91 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
92 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
93 obj->i2c = (LPC_I2C_T *)pinmap_merge(i2c_sda, i2c_scl);
95 if ((int)obj->i2c == NC) {
96 error("I2C pin mapping failed");
99 // set default frequency at 100k
100 i2c_frequency(obj, 100000);
101 i2c_conclr(obj, 1, 1, 1, 1);
102 i2c_interface_enable(obj);
106 // Enable dedicated I2C0 SDA and SCL pins (open drain)
107 LPC_SCU->SFSI2C0 = (1 << 11) | (1 << 3);
109 pinmap_pinout(sda, PinMap_I2C_SDA);
110 pinmap_pinout(scl, PinMap_I2C_SCL);
114 inline int i2c_start(i2c_t *obj) {
116 // 8.1 Before master mode can be entered, I2CON must be initialised to:
117 // - I2EN STA STO SI AA - -
119 // if AA = 0, it can't enter slave mode
120 i2c_conclr(obj, 1, 1, 1, 1);
122 // The master mode may now be entered by setting the STA bit
123 // this will generate a start condition when the bus becomes free
124 i2c_conset(obj, 1, 0, 0, 1);
127 status = i2c_status(obj);
129 // Clear start bit now transmitted, and interrupt bit
130 i2c_conclr(obj, 1, 0, 0, 0);
134 inline int i2c_stop(i2c_t *obj) {
137 // write the stop bit
138 i2c_conset(obj, 0, 1, 0, 0);
141 // wait for STO bit to reset
142 while(I2C_CONSET(obj) & (1 << 4)) {
144 if (timeout > 100000) return 1;
150 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
152 I2C_DAT(obj) = value;
154 // clear SI to init a send
157 // wait and return status
159 return i2c_status(obj);
162 static inline int i2c_do_read(i2c_t *obj, int last) {
163 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
165 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
167 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
173 // wait for it to arrive
177 return (I2C_DAT(obj) & 0xFF);
180 void i2c_frequency(i2c_t *obj, int hz) {
181 // [TODO] set pclk to /4
182 uint32_t PCLK = SystemCoreClock / 4;
184 uint32_t pulse = PCLK / (hz * 2);
187 I2C_SCLL(obj, pulse);
188 I2C_SCLH(obj, pulse);
191 // The I2C does a read or a write as a whole operation
192 // There are two types of error conditions it can encounter
193 // 1) it can not obtain the bus
194 // 2) it gets error responses at part of the transmission
196 // We tackle them as follows:
197 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
198 // which basically turns it in to a 2)
199 // 2) on error, we use the standard error mechanisms to report/debug
201 // Therefore an I2C transaction should always complete. If it doesn't it is usually
202 // because something is setup wrong (e.g. wiring), and we don't need to programatically
205 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
208 status = i2c_start(obj);
210 if ((status != 0x10) && (status != 0x08)) {
212 return I2C_ERROR_BUS_BUSY;
215 status = i2c_do_write(obj, (address | 0x01), 1);
216 if (status != 0x40) {
218 return I2C_ERROR_NO_SLAVE;
221 // Read in all except last byte
222 for (count = 0; count < (length - 1); count++) {
223 int value = i2c_do_read(obj, 0);
224 status = i2c_status(obj);
225 if (status != 0x50) {
229 data[count] = (char) value;
233 int value = i2c_do_read(obj, 1);
234 status = i2c_status(obj);
235 if (status != 0x58) {
240 data[count] = (char) value;
242 // If not repeated start, send stop.
250 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
253 status = i2c_start(obj);
255 if ((status != 0x10) && (status != 0x08)) {
257 return I2C_ERROR_BUS_BUSY;
260 status = i2c_do_write(obj, (address & 0xFE), 1);
261 if (status != 0x18) {
263 return I2C_ERROR_NO_SLAVE;
266 for (i=0; i<length; i++) {
267 status = i2c_do_write(obj, data[i], 0);
274 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
275 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
276 // i2c_clear_SI(obj);
278 // If not repeated start, send stop.
286 void i2c_reset(i2c_t *obj) {
290 int i2c_byte_read(i2c_t *obj, int last) {
291 return (i2c_do_read(obj, last) & 0xFF);
294 int i2c_byte_write(i2c_t *obj, int data) {
296 int status = i2c_do_write(obj, (data & 0xFF), 0);
299 case 0x18: case 0x28: // Master transmit ACKs
302 case 0x40: // Master receive address transmitted ACK
305 case 0xB8: // Slave transmit ACK
316 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
317 if (enable_slave != 0) {
318 i2c_conclr(obj, 1, 1, 1, 0);
319 i2c_conset(obj, 0, 0, 0, 1);
321 i2c_conclr(obj, 1, 1, 1, 1);
325 int i2c_slave_receive(i2c_t *obj) {
329 status = i2c_status(obj);
331 case 0x60: retval = 3; break;
332 case 0x70: retval = 2; break;
333 case 0xA8: retval = 1; break;
334 default : retval = 0; break;
340 int i2c_slave_read(i2c_t *obj, char *data, int length) {
347 status = i2c_status(obj);
348 if((status == 0x80) || (status == 0x90)) {
349 data[count] = I2C_DAT(obj) & 0xFF;
352 } while (((status == 0x80) || (status == 0x90) ||
353 (status == 0x060) || (status == 0x70)) && (count < length));
364 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
373 status = i2c_do_write(obj, data[count], 0);
375 } while ((count < length) && (status == 0xB8));
377 if ((status != 0xC0) && (status != 0xC8)) {
386 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
389 if ((idx >= 0) && (idx <= 3)) {
390 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
391 *((uint32_t *) addr) = address & 0xFF;
392 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
393 *((uint32_t *) addr) = mask & 0xFE;