1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 #include "mbed_assert.h"
21 static const PinMap PinMap_I2C_SDA[] = {
28 static const PinMap PinMap_I2C_SCL[] = {
35 #define I2C_CONSET(x) (x->i2c->CONSET)
36 #define I2C_CONCLR(x) (x->i2c->CONCLR)
37 #define I2C_STAT(x) (x->i2c->STAT)
38 #define I2C_DAT(x) (x->i2c->DAT)
39 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
40 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
42 static const uint32_t I2C_addr_offset[2][4] = {
43 {0x0C, 0x20, 0x24, 0x28},
44 {0x30, 0x34, 0x38, 0x3C}
47 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
48 I2C_CONCLR(obj) = (start << 5)
54 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
55 I2C_CONSET(obj) = (start << 5)
61 // Clear the Serial Interrupt (SI)
62 static inline void i2c_clear_SI(i2c_t *obj) {
63 i2c_conclr(obj, 0, 0, 1, 0);
66 static inline int i2c_status(i2c_t *obj) {
70 // Wait until the Serial Interrupt (SI) is set
71 static int i2c_wait_SI(i2c_t *obj) {
73 while (!(I2C_CONSET(obj) & (1 << 3))) {
75 if (timeout > 100000) return -1;
80 static inline void i2c_interface_enable(i2c_t *obj) {
81 I2C_CONSET(obj) = 0x40;
84 static inline void i2c_power_enable(i2c_t *obj) {
85 switch ((int)obj->i2c) {
86 case I2C_0: LPC_SC->PCONP |= 1 << 7; break;
87 case I2C_1: LPC_SC->PCONP |= 1 << 19; break;
88 case I2C_2: LPC_SC->PCONP |= 1 << 26; break;
92 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
93 // determine the SPI to use
94 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
95 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
96 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
97 MBED_ASSERT((int)obj->i2c != NC);
100 i2c_power_enable(obj);
102 // set default frequency at 100k
103 i2c_frequency(obj, 100000);
104 i2c_conclr(obj, 1, 1, 1, 1);
105 i2c_interface_enable(obj);
107 pinmap_pinout(sda, PinMap_I2C_SDA);
108 pinmap_pinout(scl, PinMap_I2C_SCL);
110 // OpenDrain must explicitly be enabled for p0.0 and p0.1
112 pin_mode(sda, OpenDrain);
115 pin_mode(scl, OpenDrain);
120 inline int i2c_start(i2c_t *obj) {
122 // 8.1 Before master mode can be entered, I2CON must be initialised to:
123 // - I2EN STA STO SI AA - -
125 // if AA = 0, it can't enter slave mode
126 i2c_conclr(obj, 1, 1, 1, 1);
128 // The master mode may now be entered by setting the STA bit
129 // this will generate a start condition when the bus becomes free
130 i2c_conset(obj, 1, 0, 0, 1);
133 status = i2c_status(obj);
135 // Clear start bit now transmitted, and interrupt bit
136 i2c_conclr(obj, 1, 0, 0, 0);
140 inline int i2c_stop(i2c_t *obj) {
143 // write the stop bit
144 i2c_conset(obj, 0, 1, 0, 0);
147 // wait for STO bit to reset
148 while(I2C_CONSET(obj) & (1 << 4)) {
150 if (timeout > 100000) return 1;
157 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
159 I2C_DAT(obj) = value;
161 // clear SI to init a send
164 // wait and return status
166 return i2c_status(obj);
169 static inline int i2c_do_read(i2c_t *obj, int last) {
170 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
172 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
174 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
180 // wait for it to arrive
184 return (I2C_DAT(obj) & 0xFF);
187 void i2c_frequency(i2c_t *obj, int hz) {
188 uint32_t PCLK = PeripheralClock;
189 uint32_t pulse = PCLK / (hz * 2);
192 I2C_SCLL(obj, pulse);
193 I2C_SCLH(obj, pulse);
196 // The I2C does a read or a write as a whole operation
197 // There are two types of error conditions it can encounter
198 // 1) it can not obtain the bus
199 // 2) it gets error responses at part of the transmission
201 // We tackle them as follows:
202 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
203 // which basically turns it in to a 2)
204 // 2) on error, we use the standard error mechanisms to report/debug
206 // Therefore an I2C transaction should always complete. If it doesn't it is usually
207 // because something is setup wrong (e.g. wiring), and we don't need to programatically
209 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
212 status = i2c_start(obj);
214 if ((status != 0x10) && (status != 0x08)) {
216 return I2C_ERROR_BUS_BUSY;
219 status = i2c_do_write(obj, (address | 0x01), 1);
220 if (status != 0x40) {
222 return I2C_ERROR_NO_SLAVE;
225 // Read in all except last byte
226 for (count = 0; count < (length - 1); count++) {
227 int value = i2c_do_read(obj, 0);
228 status = i2c_status(obj);
229 if (status != 0x50) {
233 data[count] = (char) value;
237 int value = i2c_do_read(obj, 1);
238 status = i2c_status(obj);
239 if (status != 0x58) {
244 data[count] = (char) value;
246 // If not repeated start, send stop.
254 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
257 status = i2c_start(obj);
259 if ((status != 0x10) && (status != 0x08)) {
261 return I2C_ERROR_BUS_BUSY;
264 status = i2c_do_write(obj, (address & 0xFE), 1);
265 if (status != 0x18) {
267 return I2C_ERROR_NO_SLAVE;
270 for (i=0; i<length; i++) {
271 status = i2c_do_write(obj, data[i], 0);
272 if (status != 0x28) {
278 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
279 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
280 // i2c_clear_SI(obj);
282 // If not repeated start, send stop.
290 void i2c_reset(i2c_t *obj) {
294 int i2c_byte_read(i2c_t *obj, int last) {
295 return (i2c_do_read(obj, last) & 0xFF);
298 int i2c_byte_write(i2c_t *obj, int data) {
300 int status = i2c_do_write(obj, (data & 0xFF), 0);
303 case 0x18: case 0x28: // Master transmit ACKs
307 case 0x40: // Master receive address transmitted ACK
311 case 0xB8: // Slave transmit ACK
323 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
324 if (enable_slave != 0) {
325 i2c_conclr(obj, 1, 1, 1, 0);
326 i2c_conset(obj, 0, 0, 0, 1);
328 i2c_conclr(obj, 1, 1, 1, 1);
332 int i2c_slave_receive(i2c_t *obj) {
336 status = i2c_status(obj);
338 case 0x60: retval = 3; break;
339 case 0x70: retval = 2; break;
340 case 0xA8: retval = 1; break;
341 default : retval = 0; break;
347 int i2c_slave_read(i2c_t *obj, char *data, int length) {
354 status = i2c_status(obj);
355 if((status == 0x80) || (status == 0x90)) {
356 data[count] = I2C_DAT(obj) & 0xFF;
359 } while (((status == 0x80) || (status == 0x90) ||
360 (status == 0x060) || (status == 0x70)) && (count < length));
371 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
380 status = i2c_do_write(obj, data[count], 0);
382 } while ((count < length) && (status == 0xB8));
384 if((status != 0xC0) && (status != 0xC8)) {
393 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
396 if ((idx >= 0) && (idx <= 3)) {
397 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
398 *((uint32_t *) addr) = address & 0xFF;
399 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
400 *((uint32_t *) addr) = mask & 0xFE;