1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
26 /* Acceptance filter mode in AFMR register */
28 #define ACCF_BYPASS 0x02
30 #define ACCF_FULLCAN 0x04
32 /* There are several bit timing calculators on the internet.
33 http://www.port.de/engl/canprod/sv_req_form.html
34 http://www.kvaser.com/can/index.htm
37 static const PinMap PinMap_CAN_RD[] = {
45 static const PinMap PinMap_CAN_TD[] = {
53 // Type definition to hold a CAN message
55 unsigned int reserved1 : 16;
56 unsigned int dlc : 4; // Bits 16..19: DLC - Data Length Counter
57 unsigned int reserved0 : 10;
58 unsigned int rtr : 1; // Bit 30: Set if this is a RTR message
59 unsigned int type : 1; // Bit 31: Set if this is a 29-bit ID message
60 unsigned int id; // CAN Message ID (11-bit or 29-bit)
61 unsigned char data[8]; // CAN Message Data Bytes 0-7
63 typedef struct CANMsg CANMsg;
65 static uint32_t can_irq_ids[CAN_NUM] = {0};
66 static can_irq_handler irq_handler;
68 static uint32_t can_disable(can_t *obj) {
69 uint32_t sm = obj->dev->MOD;
74 static inline void can_enable(can_t *obj) {
75 if (obj->dev->MOD & 1) {
76 obj->dev->MOD &= ~(1);
80 int can_mode(can_t *obj, CanMode mode)
82 return 0; // not implemented
85 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) {
86 return 0; // not implemented
89 static inline void can_irq(uint32_t icr, uint32_t index) {
92 for(i = 0; i < 8; i++)
94 if((can_irq_ids[index] != 0) && (icr & (1 << i)))
97 case 0: irq_handler(can_irq_ids[index], IRQ_RX); break;
98 case 1: irq_handler(can_irq_ids[index], IRQ_TX); break;
99 case 2: irq_handler(can_irq_ids[index], IRQ_ERROR); break;
100 case 3: irq_handler(can_irq_ids[index], IRQ_OVERRUN); break;
101 case 4: irq_handler(can_irq_ids[index], IRQ_WAKEUP); break;
102 case 5: irq_handler(can_irq_ids[index], IRQ_PASSIVE); break;
103 case 6: irq_handler(can_irq_ids[index], IRQ_ARB); break;
104 case 7: irq_handler(can_irq_ids[index], IRQ_BUS); break;
105 case 8: irq_handler(can_irq_ids[index], IRQ_READY); break;
111 // Have to check that the CAN block is active before reading the Interrupt
112 // Control Register, or the mbed hangs
116 if(LPC_SC->PCONP & (1 << 13)) {
117 icr = LPC_CAN1->ICR & 0x1FF;
121 if(LPC_SC->PCONP & (1 << 14)) {
122 icr = LPC_CAN2->ICR & 0x1FF;
127 // Register CAN object's irq handler
128 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
129 irq_handler = handler;
130 can_irq_ids[obj->index] = id;
133 // Unregister CAN object's irq handler
134 void can_irq_free(can_t *obj) {
135 obj->dev->IER &= ~(1);
136 can_irq_ids[obj->index] = 0;
138 if ((can_irq_ids[0] == 0) && (can_irq_ids[1] == 0)) {
139 NVIC_DisableIRQ(CAN_IRQn);
143 // Clear or set a irq
144 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
148 case IRQ_RX: ier = (1 << 0); break;
149 case IRQ_TX: ier = (1 << 1); break;
150 case IRQ_ERROR: ier = (1 << 2); break;
151 case IRQ_OVERRUN: ier = (1 << 3); break;
152 case IRQ_WAKEUP: ier = (1 << 4); break;
153 case IRQ_PASSIVE: ier = (1 << 5); break;
154 case IRQ_ARB: ier = (1 << 6); break;
155 case IRQ_BUS: ier = (1 << 7); break;
156 case IRQ_READY: ier = (1 << 8); break;
162 obj->dev->IER &= ~ier;
165 obj->dev->IER |= ier;
167 obj->dev->MOD &= ~(1);
169 // Enable NVIC if at least 1 interrupt is active
170 if(((LPC_SC->PCONP & (1 << 13)) && LPC_CAN1->IER) || ((LPC_SC->PCONP & (1 << 14)) && LPC_CAN2->IER)) {
171 NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq_n);
172 NVIC_EnableIRQ(CAN_IRQn);
175 NVIC_DisableIRQ(CAN_IRQn);
179 // This table has the sampling points as close to 75% as possible. The first
180 // value is TSEG1, the second TSEG2.
181 static const int timing_pts[23][2] = {
182 {0x0, 0x0}, // 2, 50%
183 {0x1, 0x0}, // 3, 67%
184 {0x2, 0x0}, // 4, 75%
185 {0x3, 0x0}, // 5, 80%
186 {0x3, 0x1}, // 6, 67%
187 {0x4, 0x1}, // 7, 71%
188 {0x5, 0x1}, // 8, 75%
189 {0x6, 0x1}, // 9, 78%
190 {0x6, 0x2}, // 10, 70%
191 {0x7, 0x2}, // 11, 73%
192 {0x8, 0x2}, // 12, 75%
193 {0x9, 0x2}, // 13, 77%
194 {0x9, 0x3}, // 14, 71%
195 {0xA, 0x3}, // 15, 73%
196 {0xB, 0x3}, // 16, 75%
197 {0xC, 0x3}, // 17, 76%
198 {0xD, 0x3}, // 18, 78%
199 {0xD, 0x4}, // 19, 74%
200 {0xE, 0x4}, // 20, 75%
201 {0xF, 0x4}, // 21, 76%
202 {0xF, 0x5}, // 22, 73%
203 {0xF, 0x6}, // 23, 70%
204 {0xF, 0x7}, // 24, 67%
207 static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned char psjw) {
215 bitwidth = (pclk / cclk);
217 brp = bitwidth / 0x18;
218 while ((!hit) && (brp < bitwidth / 4)) {
220 for (bits = 22; bits > 0; bits--) {
221 calcbit = (bits + 3) * (brp + 1);
222 if (calcbit == bitwidth) {
230 btr = ((timing_pts[bits][1] << 20) & 0x00700000)
231 | ((timing_pts[bits][0] << 16) & 0x000F0000)
232 | ((psjw << 14) & 0x0000C000)
233 | ((brp << 0) & 0x000003FF);
242 void can_init(can_t *obj, PinName rd, PinName td) {
243 CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
244 CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
245 obj->dev = (LPC_CAN_TypeDef *)pinmap_merge(can_rd, can_td);
246 MBED_ASSERT((int)obj->dev != NC);
248 switch ((int)obj->dev) {
249 case CAN_1: LPC_SC->PCONP |= 1 << 13; break;
250 case CAN_2: LPC_SC->PCONP |= 1 << 14; break;
253 pinmap_pinout(rd, PinMap_CAN_RD);
254 pinmap_pinout(td, PinMap_CAN_TD);
256 switch ((int)obj->dev) {
257 case CAN_1: obj->index = 0; break;
258 case CAN_2: obj->index = 1; break;
262 obj->dev->IER = 0; // Disable Interrupts
263 can_frequency(obj, 100000);
265 LPC_CANAF->AFMR = ACCF_BYPASS; // Bypass Filter
268 void can_free(can_t *obj) {
269 switch ((int)obj->dev) {
270 case CAN_1: LPC_SC->PCONP &= ~(1 << 13); break;
271 case CAN_2: LPC_SC->PCONP &= ~(1 << 14); break;
275 int can_frequency(can_t *obj, int f) {
276 int pclk = PeripheralClock;
278 int btr = can_speed(pclk, (unsigned int)f, 1);
281 uint32_t modmask = can_disable(obj);
283 obj->dev->MOD = modmask;
290 int can_write(can_t *obj, CAN_Message msg, int cc) {
291 unsigned int CANStatus;
297 m.dlc = msg.len & 0xF;
300 memcpy(m.data, msg.data, msg.len);
301 const unsigned int *buf = (const unsigned int *)&m;
303 CANStatus = obj->dev->SR;
304 if (CANStatus & 0x00000004) {
305 obj->dev->TFI1 = buf[0] & 0xC00F0000;
306 obj->dev->TID1 = buf[1];
307 obj->dev->TDA1 = buf[2];
308 obj->dev->TDB1 = buf[3];
310 obj->dev->CMR = 0x30;
312 obj->dev->CMR = 0x21;
316 } else if (CANStatus & 0x00000400) {
317 obj->dev->TFI2 = buf[0] & 0xC00F0000;
318 obj->dev->TID2 = buf[1];
319 obj->dev->TDA2 = buf[2];
320 obj->dev->TDB2 = buf[3];
322 obj->dev->CMR = 0x50;
324 obj->dev->CMR = 0x41;
328 } else if (CANStatus & 0x00040000) {
329 obj->dev->TFI3 = buf[0] & 0xC00F0000;
330 obj->dev->TID3 = buf[1];
331 obj->dev->TDA3 = buf[2];
332 obj->dev->TDB3 = buf[3];
334 obj->dev->CMR = 0x90;
336 obj->dev->CMR = 0x81;
344 int can_read(can_t *obj, CAN_Message *msg, int handle) {
346 unsigned int *i = (unsigned int *)&x;
350 if (obj->dev->GSR & 0x1) {
351 *i++ = obj->dev->RFS; // Frame
352 *i++ = obj->dev->RID; // ID
353 *i++ = obj->dev->RDA; // Data A
354 *i++ = obj->dev->RDB; // Data B
355 obj->dev->CMR = 0x04; // release receive buffer
359 msg->format = (x.type)? CANExtended : CANStandard;
360 msg->type = (x.rtr)? CANRemote: CANData;
361 memcpy(msg->data,x.data,x.dlc);
368 void can_reset(can_t *obj) {
370 obj->dev->GSR = 0; // Reset error counter when CAN1MOD is in reset
373 unsigned char can_rderror(can_t *obj) {
374 return (obj->dev->GSR >> 16) & 0xFF;
377 unsigned char can_tderror(can_t *obj) {
378 return (obj->dev->GSR >> 24) & 0xFF;
381 void can_monitor(can_t *obj, int silent) {
382 uint32_t mod_mask = can_disable(obj);
384 obj->dev->MOD |= (1 << 1);
386 obj->dev->MOD &= ~(1 << 1);
388 if (!(mod_mask & 1)) {