1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 #include "mbed_assert.h"
22 #include "mbed_error.h"
24 static const SWM_Map SWM_SPI_SSEL[] = {
29 static const SWM_Map SWM_SPI_SCLK[] = {
34 static const SWM_Map SWM_SPI_MOSI[] = {
39 static const SWM_Map SWM_SPI_MISO[] = {
44 // bit flags for used SPIs
45 static unsigned char spi_used = 0;
46 static int get_available_spi(PinName mosi, PinName miso, PinName sclk, PinName ssel)
49 return 0; // The first user
55 // Investigate if same pins as the used SPI0/1 - to be able to reuse it
56 for (int spi_n = 0; spi_n < 2; spi_n++) {
57 if (spi_used & (1<<spi_n)) {
59 swm = &SWM_SPI_SCLK[spi_n];
60 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
61 if (regVal != (sclk << swm->offset)) {
62 // Existing pin is not the same as the one we want
68 swm = &SWM_SPI_MOSI[spi_n];
69 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
70 if (regVal != (mosi << swm->offset)) {
71 // Existing pin is not the same as the one we want
77 swm = &SWM_SPI_MISO[spi_n];
78 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
79 if (regVal != (miso << swm->offset)) {
80 // Existing pin is not the same as the one we want
86 swm = &SWM_SPI_SSEL[spi_n];
87 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
88 if (regVal != (ssel << swm->offset)) {
89 // Existing pin is not the same as the one we want
94 // The pins for the currently used SPIx are the same as the
95 // ones we want so we will reuse it
100 // None of the existing SPIx pin setups match the pins we want
101 // so the last hope is to select one unused SPIx
102 if ((spi_used & 1) == 0) {
104 } else if ((spi_used & 2) == 0) {
108 // No matching setup and no free SPIx
112 static inline void spi_disable(spi_t *obj);
113 static inline void spi_enable(spi_t *obj);
115 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
117 int spi_n = get_available_spi(mosi, miso, sclk, ssel);
119 error("No available SPI");
123 spi_used |= (1 << spi_n);
125 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
131 swm = &SWM_SPI_SCLK[obj->spi_n];
132 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
133 LPC_SWM->PINASSIGN[swm->n] = regVal | (sclk << swm->offset);
137 swm = &SWM_SPI_MOSI[obj->spi_n];
138 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
139 LPC_SWM->PINASSIGN[swm->n] = regVal | (mosi << swm->offset);
143 swm = &SWM_SPI_MISO[obj->spi_n];
144 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
145 LPC_SWM->PINASSIGN[swm->n] = regVal | (miso << swm->offset);
149 swm = &SWM_SPI_SSEL[obj->spi_n];
150 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
151 LPC_SWM->PINASSIGN[swm->n] = regVal | (ssel << swm->offset);
155 obj->spi->INTENCLR = 0x3f;
157 // enable power and clocking
158 LPC_SYSCON->SYSAHBCLKCTRL1 |= (0x1 << (obj->spi_n + 9));
159 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (obj->spi_n + 9));
160 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (obj->spi_n + 9));
162 // set default format and frequency
164 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
166 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
168 spi_frequency(obj, 1000000);
170 // enable the spi channel
174 void spi_free(spi_t *obj)
178 void spi_format(spi_t *obj, int bits, int mode, int slave)
181 MBED_ASSERT((bits >= 1 && bits <= 16) && (mode >= 0 && mode <= 3));
183 int polarity = (mode & 0x2) ? 1 : 0;
184 int phase = (mode & 0x1) ? 1 : 0;
187 int LEN = bits - 1; // LEN - Data Length
188 int CPOL = (polarity) ? 1 : 0; // CPOL - Clock Polarity select
189 int CPHA = (phase) ? 1 : 0; // CPHA - Clock Phase select
191 uint32_t tmp = obj->spi->CFG;
192 tmp &= ~((1 << 5) | (1 << 4) | (1 << 2));
193 tmp |= (CPOL << 5) | (CPHA << 4) | ((slave ? 0 : 1) << 2);
196 // select frame length
197 tmp = obj->spi->TXCTL;
200 obj->spi->TXCTL = tmp;
205 void spi_frequency(spi_t *obj, int hz)
209 // rise DIV value if it cannot be divided
210 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
216 static inline void spi_disable(spi_t *obj)
218 obj->spi->CFG &= ~(1 << 0);
221 static inline void spi_enable(spi_t *obj)
223 obj->spi->CFG |= (1 << 0);
226 static inline int spi_readable(spi_t *obj)
228 return obj->spi->STAT & (1 << 0);
231 static inline int spi_writeable(spi_t *obj)
233 return obj->spi->STAT & (1 << 1);
236 static inline void spi_write(spi_t *obj, int value)
238 while (!spi_writeable(obj));
240 obj->spi->TXCTL |= (1 << 20);
241 obj->spi->TXDAT = (value & 0xffff);
244 static inline int spi_read(spi_t *obj)
246 while (!spi_readable(obj));
247 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
250 int spi_busy(spi_t *obj)
252 // checking RXOV(Receiver Overrun interrupt flag)
253 return obj->spi->STAT & (1 << 2);
256 int spi_master_write(spi_t *obj, int value)
258 spi_write(obj, value);
259 return spi_read(obj);
262 int spi_slave_receive(spi_t *obj)
264 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
267 int spi_slave_read(spi_t *obj)
269 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
272 void spi_slave_write(spi_t *obj, int value)
274 while (spi_writeable(obj) == 0) ;
275 obj->spi->TXDAT = value;