1 /*******************************************************************************
2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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11 * The above copyright notice and this permission notice shall be included
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15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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31 *******************************************************************************
34 #include "mbed_assert.h"
35 #include "analogin_api.h"
36 #include "clkman_regs.h"
37 #include "pwrman_regs.h"
39 #include "PeripheralPins.h"
41 #define PGA_TRK_CNT 0x1F
42 #define ADC_ACT_CNT 0x1
43 #define ADC_PGA_CNT 0x1
44 #define ADC_ACQ_CNT 0x1
45 #define ADC_SLP_CNT 0x1
47 //******************************************************************************
48 void analogin_init(analogin_t *obj, PinName pin)
50 // Make sure pin is an analog pin we can use for ADC
51 MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC);
53 // Set the object pointer
55 obj->adccfg = MXC_ADCCFG;
56 obj->adc_fifo = MXC_ADC_FIFO;
59 // Set the ADC clock to the system clock frequency
60 MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT,
61 (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM <<
62 MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)));
65 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
67 // Setup and hold window
68 MXC_SET_FIELD(&obj->adc->tg_ctrl0, MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT, PGA_TRK_CNT);
70 // Setup sampling count and timing
71 MXC_SET_FIELD(&obj->adc->tg_ctrl1, (MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT |
72 MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT | MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT),
73 ((ADC_PGA_CNT << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS) |
74 (ADC_ACQ_CNT << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS) |
75 (ADC_SLP_CNT << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS) |
76 (MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT)));
79 //******************************************************************************
80 float analogin_read(analogin_t *obj)
82 // Convert integer to float
83 return (((float)analogin_read_u16(obj)/(float)0xFFFF));
86 //******************************************************************************
87 uint16_t analogin_read_u16(analogin_t *obj)
89 // Set the pin to take readings from
92 if(obj->adc_pin >> PORT_SHIFT == 0xB) {
93 mux_pos = (obj->adc_pin & 0xF) + 8;
95 mux_pos = (obj->adc_pin & 0xF);
98 if(obj->adc_pin >> PORT_SHIFT == 0xC) {
100 mux_pos = (obj->adc_pin & 0xF) + 8;
104 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
107 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
109 // Setup the ADC clock
110 MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
111 MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
112 ((MXC_E_ADC_MODE_SMPLCNT_FULL_RATE << MXC_F_ADC_CTRL0_ADC_MODE_POS) |
113 (MXC_E_ADC_AVG_MODE_FILTER_OUTPUT << MXC_F_ADC_CTRL0_AVG_MODE_POS) |
114 (0x2 << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS) |
115 MXC_F_ADC_CTRL0_ADC_CLK_EN));
117 // Setup the input multiplexor
118 MXC_SET_FIELD(&obj->adc->pga_ctrl, (MXC_F_ADC_PGA_CTRL_MUX_CH_SEL |
119 MXC_F_ADC_PGA_CTRL_MUX_DIFF | MXC_F_ADC_PGA_CTRL_PGA_GAIN),
120 ((mux_pos << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS) |
121 (diff << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS)));
123 // Setup voltage reference
124 MXC_SET_FIELD(&MXC_AFE->ctrl1, MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL,
125 (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
126 (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
128 // Clear the done bit
129 obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
132 obj->adc->tg_ctrl0 |= (1 << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS);
134 // Set the start bit to take the sample
135 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_START;
137 // Wait for the conversion to complete
138 while(!(obj->adc->intr & MXC_F_ADC_INTR_DONE_IF)) {}
140 // Get sample from the fifo
141 uint16_t sample = (uint16_t)(obj->adc->out & 0xFFFF);
144 obj->adc->ctrl0 &= ~MXC_F_ADC_CTRL0_CPU_ADC_EN;