2 ******************************************************************************
3 * @file stm32l0xx_hal_i2s.c
4 * @author MCD Application Team
6 * @date 06-February-2015
7 * @brief I2S HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral State and Errors functions
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
18 The I2S HAL driver can be used as follow:
20 (#) Declare a I2S_HandleTypeDef handle structure.
21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
22 (##) Enable the SPIx interface clock.
23 (##) I2S pins configuration:
24 (+++) Enable the clock for the I2S GPIOs.
25 (+++) Configure these I2S pins as alternate function.
26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
27 and HAL_I2S_Receive_IT() APIs).
28 (+++) Configure the I2Sx interrupt priority.
29 (+++) Enable the NVIC I2S IRQ handle.
30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
31 and HAL_I2S_Receive_DMA() APIs:
32 (+++) Declare a DMA handle structure for the Tx/Rx Channel.
33 (+++) Enable the DMAx interface clock.
34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
35 (+++) Configure the DMA Tx/Rx Channel.
36 (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
41 using HAL_I2S_Init() function.
43 -@- The specific I2S interrupts (Transmission complete interrupt,
44 RXNE interrupt and Error Interrupts) will be managed using the macros
45 __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
46 -@- Make sure that either:
47 (+@) External clock source is configured after setting correctly
48 the define constant HSE_VALUE in the stm32l0xx_hal_conf.h file.
50 (#) Three mode of operations are available within this driver :
52 *** Polling mode IO operation ***
53 =================================
55 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
56 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
58 *** Interrupt mode IO operation ***
59 ===================================
61 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
62 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
63 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
64 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
65 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
66 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
67 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
68 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
69 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
70 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
71 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
72 add his own code by customization of function pointer HAL_I2S_ErrorCallback
74 *** DMA mode IO operation ***
75 ==============================
77 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
78 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
79 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
80 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
81 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
82 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
83 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
84 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
85 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
86 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
87 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
88 add his own code by customization of function pointer HAL_I2S_ErrorCallback
89 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
90 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
91 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
93 *** I2S HAL driver macros list ***
94 ===================================
96 Below the list of most used macros in USART HAL driver.
98 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
99 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
100 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
101 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
102 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
105 (@) You can refer to the I2S HAL driver header file for more useful macros
108 ******************************************************************************
111 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
113 * Redistribution and use in source and binary forms, with or without modification,
114 * are permitted provided that the following conditions are met:
115 * 1. Redistributions of source code must retain the above copyright notice,
116 * this list of conditions and the following disclaimer.
117 * 2. Redistributions in binary form must reproduce the above copyright notice,
118 * this list of conditions and the following disclaimer in the documentation
119 * and/or other materials provided with the distribution.
120 * 3. Neither the name of STMicroelectronics nor the names of its contributors
121 * may be used to endorse or promote products derived from this software
122 * without specific prior written permission.
124 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
125 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
126 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
127 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
128 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
129 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
130 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
131 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
132 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
133 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
135 ******************************************************************************
138 #if !defined(STM32L031xx) && !defined(STM32L041xx)
139 /* Includes ------------------------------------------------------------------*/
140 #include "stm32l0xx_hal.h"
142 #ifdef HAL_I2S_MODULE_ENABLED
143 /** @addtogroup STM32L0xx_HAL_Driver
147 /** @defgroup I2S I2S
148 * @brief I2S HAL module driver
154 /* Private typedef -----------------------------------------------------------*/
155 /* Private define ------------------------------------------------------------*/
156 /* Private macro -------------------------------------------------------------*/
157 /* Private variables ---------------------------------------------------------*/
158 /* Private function prototypes -----------------------------------------------*/
159 /** @addtogroup I2S_Private_Functions I2S Private Functions
162 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
163 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
164 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
165 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
166 static void I2S_DMAError(DMA_HandleTypeDef *hdma);
167 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
168 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
169 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
174 /* Exported functions ---------------------------------------------------------*/
175 /** @defgroup I2S_Exported_Functions I2S Exported Functions
179 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
180 * @brief Initialization and Configuration functions
183 ===============================================================================
184 ##### Initialization and de-initialization functions #####
185 ===============================================================================
186 [..] This subsection provides a set of functions allowing to initialize and
187 de-initialiaze the I2Sx peripheral in simplex mode:
189 (+) User must Implement HAL_I2S_MspInit() function in which he configures
190 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
192 (+) Call the function HAL_I2S_Init() to configure the selected device with
193 the selected configuration:
201 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
202 of the selected I2Sx periperal.
208 * @brief Initializes the I2S according to the specified parameters
209 * in the I2S_InitTypeDef and create the associated handle.
210 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
211 * the configuration information for I2S module
214 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
216 uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1;
217 uint32_t tmp = 0, i2sclk = 0, tmpreg = 0;
219 /* Check the I2S handle allocation */
225 /* Check the I2S parameters */
226 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
227 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
228 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
229 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
230 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
231 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
232 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
234 if(hi2s->State == HAL_I2S_STATE_RESET)
236 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
237 HAL_I2S_MspInit(hi2s);
240 hi2s->State = HAL_I2S_STATE_BUSY;
242 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
243 if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
245 i2sodd = (uint32_t)0;
246 i2sdiv = (uint32_t)2;
248 /* If the requested audio frequency is not the default, compute the prescaler */
251 /* Check the frame length (For the Prescaler computing) *******************/
252 if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
254 /* Packet length is 16 bits */
259 /* Packet length is 32 bits */
263 /* Get the source clock value: based on System Clock value */
264 i2sclk = HAL_RCC_GetSysClockFreq();
266 /* Compute the Real divider depending on the MCLK output state, with a floating point */
267 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
269 /* MCLK output is enabled */
270 tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
274 /* MCLK output is disabled */
275 tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
278 /* Remove the flatting point */
281 /* Check the parity of the divider */
282 i2sodd = (uint32_t)(tmp & (uint32_t)1);
284 /* Compute the i2sdiv prescaler */
285 i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
287 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
288 i2sodd = (uint32_t) (i2sodd << 8);
291 /* Test if the divider is 1 or 0 or greater than 0xFF */
292 if((i2sdiv < 2) || (i2sdiv > 0xFF))
294 /* Set the default values */
299 /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
301 /* Write to SPIx I2SPR register the computed value */
302 hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
304 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
305 /* And configure the I2S with the I2S_InitStruct values */
306 MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\
307 SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\
308 SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\
309 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD),\
310 (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\
311 hi2s->Init.Standard | hi2s->Init.DataFormat |\
314 /* Get the I2SCFGR register value */
315 tmpreg = hi2s->Instance->I2SCFGR;
317 #if defined(SPI_I2SCFGR_ASTRTEN)
318 if (hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT)
320 /* Write to SPIx I2SCFGR */
321 hi2s->Instance->I2SCFGR = tmpreg | SPI_I2SCFGR_ASTRTEN;
325 /* Write to SPIx I2SCFGR */
326 hi2s->Instance->I2SCFGR = tmpreg;
329 /* Write to SPIx I2SCFGR */
330 hi2s->Instance->I2SCFGR = tmpreg;
333 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
334 hi2s->State= HAL_I2S_STATE_READY;
340 * @brief DeInitializes the I2S peripheral
341 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
342 * the configuration information for I2S module
345 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
347 /* Check the I2S handle allocation */
353 hi2s->State = HAL_I2S_STATE_BUSY;
355 /* Disable the I2S Peripheral Clock */
356 __HAL_I2S_DISABLE(hi2s);
358 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
359 HAL_I2S_MspDeInit(hi2s);
361 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
362 hi2s->State = HAL_I2S_STATE_RESET;
371 * @brief I2S MSP Init
372 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
373 * the configuration information for I2S module
376 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
378 /* NOTE : This function Should not be modified, when the callback is needed,
379 the HAL_I2S_MspInit could be implemented in the user file
384 * @brief I2S MSP DeInit
385 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
386 * the configuration information for I2S module
389 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
391 /* NOTE : This function Should not be modified, when the callback is needed,
392 the HAL_I2S_MspDeInit could be implemented in the user file
400 /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
401 * @brief Data transfers functions
404 ===============================================================================
405 ##### IO operation functions #####
406 ===============================================================================
408 This subsection provides a set of functions allowing to manage the I2S data
411 (#) There are two modes of transfer:
412 (++) Blocking mode : The communication is performed in the polling mode.
413 The status of all data processing is returned by the same function
414 after finishing transfer.
415 (++) No-Blocking mode : The communication is performed using Interrupts
416 or DMA. These functions return the status of the transfer startup.
417 The end of the data processing will be indicated through the
418 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
421 (#) Blocking mode functions are :
422 (++) HAL_I2S_Transmit()
423 (++) HAL_I2S_Receive()
425 (#) No-Blocking mode functions with Interrupt are :
426 (++) HAL_I2S_Transmit_IT()
427 (++) HAL_I2S_Receive_IT()
429 (#) No-Blocking mode functions with DMA are :
430 (++) HAL_I2S_Transmit_DMA()
431 (++) HAL_I2S_Receive_DMA()
433 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
434 (++) HAL_I2S_TxCpltCallback()
435 (++) HAL_I2S_RxCpltCallback()
436 (++) HAL_I2S_ErrorCallback()
443 * @brief Transmit an amount of data in blocking mode
444 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
445 * the configuration information for I2S module
446 * @param pData: a 16-bit pointer to data buffer.
447 * @param Size: number of data sample to be sent:
448 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
449 * configuration phase, the Size parameter means the number of 16-bit data length
450 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
451 * the Size parameter means the number of 16-bit data length.
452 * @param Timeout: Timeout duration
453 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
454 * between Master and Slave(example: audio streaming).
455 * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz
458 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
460 if((pData == NULL ) || (Size == 0))
468 if(hi2s->State == HAL_I2S_STATE_READY)
470 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
471 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
473 hi2s->TxXferSize = (Size << 1);
474 hi2s->TxXferCount = (Size << 1);
478 hi2s->TxXferSize = Size;
479 hi2s->TxXferCount = Size;
482 /* Set state and reset error code */
483 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
484 hi2s->State = HAL_I2S_STATE_BUSY_TX;
485 hi2s->pTxBuffPtr = pData;
487 /* Check if the I2S is already enabled */
488 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
490 /* Enable I2S peripheral */
491 __HAL_I2S_ENABLE(hi2s);
494 while(hi2s->TxXferCount > 0)
496 /* Wait until TXE flag is set */
497 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
501 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
505 /* Wait until TXE flag is set, to confirm the end of the transaction */
506 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
510 /* Wait until Busy flag is reset */
511 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
516 hi2s->State = HAL_I2S_STATE_READY;
518 /* Process Unlocked */
525 /* Process Unlocked */
532 * @brief Receive an amount of data in blocking mode
533 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
534 * the configuration information for I2S module
535 * @param pData: a 16-bit pointer to data buffer.
536 * @param Size: number of data sample to be sent:
537 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
538 * configuration phase, the Size parameter means the number of 16-bit data length
539 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
540 * the Size parameter means the number of 16-bit data length.
541 * @param Timeout: Timeout duration
542 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
543 * between Master and Slave(example: audio streaming).
544 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
545 * in continouse way and as the I2S is not disabled at the end of the I2S transaction.
546 * @note This function can use an Audio Frequency up to 44KHz when I2S Clock Source is 32MHz
549 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
551 if((pData == NULL ) || (Size == 0))
559 if(hi2s->State == HAL_I2S_STATE_READY)
561 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
562 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
564 hi2s->RxXferSize = (Size << 1);
565 hi2s->RxXferCount = (Size << 1);
569 hi2s->RxXferSize = Size;
570 hi2s->RxXferCount = Size;
573 /* Set state and reset error code */
574 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
575 hi2s->State = HAL_I2S_STATE_BUSY_RX;
576 hi2s->pRxBuffPtr = pData;
578 /* Check if the I2S is already enabled */
579 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
581 /* Enable I2S peripheral */
582 __HAL_I2S_ENABLE(hi2s);
585 /* Check if Master Receiver mode is selected */
586 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
588 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
589 access to the SPI_SR register. */
590 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
594 while(hi2s->RxXferCount > 0)
596 /* Wait until RXNE flag is set */
597 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
602 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
606 hi2s->State = HAL_I2S_STATE_READY;
608 /* Process Unlocked */
615 /* Process Unlocked */
622 * @brief Transmit an amount of data in non-blocking mode with Interrupt
623 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
624 * the configuration information for I2S module
625 * @param pData: a 16-bit pointer to data buffer.
626 * @param Size: number of data sample to be sent:
627 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
628 * configuration phase, the Size parameter means the number of 16-bit data length
629 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
630 * the Size parameter means the number of 16-bit data length.
631 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
632 * between Master and Slave(example: audio streaming).
633 * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz
636 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
638 if((pData == NULL) || (Size == 0))
646 if(hi2s->State == HAL_I2S_STATE_READY)
648 hi2s->pTxBuffPtr = pData;
649 hi2s->State = HAL_I2S_STATE_BUSY_TX;
650 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
652 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
653 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
655 hi2s->TxXferSize = (Size << 1);
656 hi2s->TxXferCount = (Size << 1);
660 hi2s->TxXferSize = Size;
661 hi2s->TxXferCount = Size;
664 /* Enable TXE and ERR interrupt */
665 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
667 /* Check if the I2S is already enabled */
668 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
670 /* Enable I2S peripheral */
671 __HAL_I2S_ENABLE(hi2s);
674 /* Process Unlocked */
681 /* Process Unlocked */
688 * @brief Receive an amount of data in non-blocking mode with Interrupt
689 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
690 * the configuration information for I2S module
691 * @param pData: a 16-bit pointer to the Receive data buffer.
692 * @param Size: number of data sample to be sent:
693 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
694 * configuration phase, the Size parameter means the number of 16-bit data length
695 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
696 * the Size parameter means the number of 16-bit data length.
697 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
698 * between Master and Slave(example: audio streaming).
699 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
700 * between Master and Slave otherwise the I2S interrupt should be optimized.
701 * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz
704 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
706 if((pData == NULL) || (Size == 0))
714 if(hi2s->State == HAL_I2S_STATE_READY)
716 hi2s->pRxBuffPtr = pData;
717 hi2s->State = HAL_I2S_STATE_BUSY_RX;
718 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
720 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
721 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
723 hi2s->RxXferSize = (Size << 1);
724 hi2s->RxXferCount = (Size << 1);
728 hi2s->RxXferSize = Size;
729 hi2s->RxXferCount = Size;
732 /* Enable RXNE and ERR interrupt */
733 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
735 /* Check if the I2S is already enabled */
736 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
738 /* Enable I2S peripheral */
739 __HAL_I2S_ENABLE(hi2s);
742 /* Process Unlocked */
749 /* Process Unlocked */
756 * @brief Transmit an amount of data in non-blocking mode with DMA
757 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
758 * the configuration information for I2S module
759 * @param pData: a 16-bit pointer to the Transmit data buffer.
760 * @param Size: number of data sample to be sent:
761 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
762 * configuration phase, the Size parameter means the number of 16-bit data length
763 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
764 * the Size parameter means the number of 16-bit data length.
765 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
766 * between Master and Slave(example: audio streaming).
769 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
771 if((pData == NULL) || (Size == 0))
779 if(hi2s->State == HAL_I2S_STATE_READY)
781 hi2s->pTxBuffPtr = pData;
782 hi2s->State = HAL_I2S_STATE_BUSY_TX;
783 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
785 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
786 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
788 hi2s->TxXferSize = (Size << 1);
789 hi2s->TxXferCount = (Size << 1);
793 hi2s->TxXferSize = Size;
794 hi2s->TxXferCount = Size;
797 /* Set the I2S Tx DMA Half transfert complete callback */
798 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
800 /* Set the I2S Tx DMA transfert complete callback */
801 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
803 /* Set the DMA error callback */
804 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
806 /* Enable the Tx DMA Channel */
807 HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
809 /* Check if the I2S is already enabled */
810 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
812 /* Enable I2S peripheral */
813 __HAL_I2S_ENABLE(hi2s);
816 /* Check if the I2S Tx request is already enabled */
817 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
819 /* Enable Tx DMA Request */
820 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
823 /* Process Unlocked */
830 /* Process Unlocked */
837 * @brief Receive an amount of data in non-blocking mode with DMA
838 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
839 * the configuration information for I2S module
840 * @param pData: a 16-bit pointer to the Receive data buffer.
841 * @param Size: number of data sample to be sent:
842 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
843 * configuration phase, the Size parameter means the number of 16-bit data length
844 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
845 * the Size parameter means the number of 16-bit data length.
846 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
847 * between Master and Slave(example: audio streaming).
850 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
852 if((pData == NULL) || (Size == 0))
860 if(hi2s->State == HAL_I2S_STATE_READY)
862 hi2s->pRxBuffPtr = pData;
863 hi2s->State = HAL_I2S_STATE_BUSY_RX;
864 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
866 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
867 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
869 hi2s->RxXferSize = (Size << 1);
870 hi2s->RxXferCount = (Size << 1);
874 hi2s->RxXferSize = Size;
875 hi2s->RxXferCount = Size;
879 /* Set the I2S Rx DMA Half transfert complete callback */
880 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
882 /* Set the I2S Rx DMA transfert complete callback */
883 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
885 /* Set the DMA error callback */
886 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
888 /* Check if Master Receiver mode is selected */
889 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
891 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
892 access to the SPI_SR register. */
893 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
896 /* Enable the Rx DMA Channel */
897 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
899 /* Check if the I2S is already enabled */
900 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
902 /* Enable I2S peripheral */
903 __HAL_I2S_ENABLE(hi2s);
906 /* Check if the I2S Rx request is already enabled */
907 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
909 /* Enable Rx DMA Request */
910 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
913 /* Process Unlocked */
920 /* Process Unlocked */
927 * @brief Pauses the audio stream playing from the Media.
928 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
929 * the configuration information for I2S module
932 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
937 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
939 /* Disable the I2S DMA Tx request */
940 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
942 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
944 /* Disable the I2S DMA Rx request */
945 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
948 /* Process Unlocked */
955 * @brief Resumes the audio stream playing from the Media.
956 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
957 * the configuration information for I2S module
960 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
965 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
967 /* Enable the I2S DMA Tx request */
968 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
970 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
972 /* Enable the I2S DMA Rx request */
973 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
976 /* If the I2S peripheral is still not enabled, enable it */
977 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
979 /* Enable I2S peripheral */
980 __HAL_I2S_ENABLE(hi2s);
983 /* Process Unlocked */
990 * @brief Stops the audio stream playing from the Media.
991 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
992 * the configuration information for I2S module
995 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
1000 /* Disable the I2S Tx/Rx DMA requests */
1001 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1002 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1004 /* Abort the I2S DMA Channel tx */
1005 if(hi2s->hdmatx != NULL)
1007 /* Disable the I2S DMA channel */
1008 __HAL_DMA_DISABLE(hi2s->hdmatx);
1009 HAL_DMA_Abort(hi2s->hdmatx);
1011 /* Abort the I2S DMA Channel rx */
1012 if(hi2s->hdmarx != NULL)
1014 /* Disable the I2S DMA channel */
1015 __HAL_DMA_DISABLE(hi2s->hdmarx);
1016 HAL_DMA_Abort(hi2s->hdmarx);
1019 /* Disable I2S peripheral */
1020 __HAL_I2S_DISABLE(hi2s);
1022 hi2s->State = HAL_I2S_STATE_READY;
1024 /* Process Unlocked */
1031 * @brief This function handles I2S interrupt request.
1032 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1033 * the configuration information for I2S module
1036 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
1038 uint32_t i2ssr = hi2s->Instance->SR;
1040 /* I2S in mode Receiver ------------------------------------------------*/
1041 if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
1042 ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
1044 I2S_Receive_IT(hi2s);
1048 /* I2S in mode Tramitter -----------------------------------------------*/
1049 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
1051 I2S_Transmit_IT(hi2s);
1055 /* I2S interrupt error -------------------------------------------------*/
1056 if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)
1058 /* I2S Overrun error interrupt occured ---------------------------------*/
1059 if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR)
1061 /* Disable RXNE and ERR interrupt */
1062 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1064 /* Set the error code and execute error callback*/
1065 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
1068 /* I2S Underrun error interrupt occured --------------------------------*/
1069 if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR)
1071 /* Disable TXE and ERR interrupt */
1072 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1074 /* Set the error code and execute error callback*/
1075 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
1078 /* Set the I2S State ready */
1079 hi2s->State = HAL_I2S_STATE_READY;
1080 /* Call the Error Callback */
1081 HAL_I2S_ErrorCallback(hi2s);
1086 * @brief Tx Transfer Half completed callbacks
1087 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1088 * the configuration information for I2S module
1091 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1093 /* NOTE : This function Should not be modified, when the callback is needed,
1094 the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
1099 * @brief Tx Transfer completed callbacks
1100 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1101 * the configuration information for I2S module
1104 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
1106 /* NOTE : This function Should not be modified, when the callback is needed,
1107 the HAL_I2S_TxCpltCallback could be implemented in the user file
1112 * @brief Rx Transfer half completed callbacks
1113 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1114 * the configuration information for I2S module
1117 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1119 /* NOTE : This function Should not be modified, when the callback is needed,
1120 the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
1125 * @brief Rx Transfer completed callbacks
1126 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1127 * the configuration information for I2S module
1130 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
1132 /* NOTE : This function Should not be modified, when the callback is needed,
1133 the HAL_I2S_RxCpltCallback could be implemented in the user file
1138 * @brief I2S error callbacks
1139 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1140 * the configuration information for I2S module
1143 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
1145 /* NOTE : This function Should not be modified, when the callback is needed,
1146 the HAL_I2S_ErrorCallback could be implemented in the user file
1154 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
1155 * @brief Peripheral State functions
1158 ===============================================================================
1159 ##### Peripheral State and Errors functions #####
1160 ===============================================================================
1162 This subsection permits to get in run-time the status of the peripheral
1170 * @brief Return the I2S state
1171 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1172 * the configuration information for I2S module
1175 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
1181 * @brief Return the I2S error code
1182 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1183 * the configuration information for I2S module
1184 * @retval I2S Error Code
1186 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
1188 return hi2s->ErrorCode;
1198 /* Private functions ---------------------------------------------------------*/
1199 /** @addtogroup I2S_Private_Functions I2S Private Functions
1203 * @brief DMA I2S transmit process complete callback
1204 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1205 * the configuration information for the specified DMA module.
1208 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
1210 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1212 if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1214 /* Disable Tx DMA Request */
1215 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1217 hi2s->TxXferCount = 0;
1218 hi2s->State = HAL_I2S_STATE_READY;
1220 HAL_I2S_TxCpltCallback(hi2s);
1224 * @brief DMA I2S transmit process half complete callback
1225 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1226 * the configuration information for the specified DMA module.
1229 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
1231 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1233 HAL_I2S_TxHalfCpltCallback(hi2s);
1237 * @brief DMA I2S receive process complete callback
1238 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1239 * the configuration information for the specified DMA module.
1242 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
1244 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1246 if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1248 /* Disable Rx DMA Request */
1249 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1250 hi2s->RxXferCount = 0;
1251 hi2s->State = HAL_I2S_STATE_READY;
1253 HAL_I2S_RxCpltCallback(hi2s);
1257 * @brief DMA I2S receive process half complete callback
1258 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1259 * the configuration information for the specified DMA module.
1262 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1264 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1266 HAL_I2S_RxHalfCpltCallback(hi2s);
1270 * @brief DMA I2S communication error callback
1271 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1272 * the configuration information for the specified DMA module.
1275 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
1277 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1279 /* Disable Rx and Tx DMA Request */
1280 CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
1281 hi2s->TxXferCount = 0;
1282 hi2s->RxXferCount = 0;
1284 hi2s->State= HAL_I2S_STATE_READY;
1286 /* Set the error code and execute error callback*/
1287 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
1288 HAL_I2S_ErrorCallback(hi2s);
1292 * @brief Transmit an amount of data in non-blocking mode with Interrupt
1293 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1294 * the configuration information for I2S module
1297 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
1300 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
1301 hi2s->TxXferCount--;
1303 if(hi2s->TxXferCount == 0)
1305 /* Disable TXE and ERR interrupt */
1306 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1308 hi2s->State = HAL_I2S_STATE_READY;
1309 HAL_I2S_TxCpltCallback(hi2s);
1314 * @brief Receive an amount of data in non-blocking mode with Interrupt
1315 * @param hi2s: I2S handle
1318 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
1321 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
1322 hi2s->RxXferCount--;
1324 if(hi2s->RxXferCount == 0)
1326 /* Disable RXNE and ERR interrupt */
1327 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1329 hi2s->State = HAL_I2S_STATE_READY;
1330 HAL_I2S_RxCpltCallback(hi2s);
1336 * @brief This function handles I2S Communication Timeout.
1337 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1338 * the configuration information for I2S module
1339 * @param Flag: Flag checked
1340 * @param Status: Value of the flag expected
1341 * @param Timeout: Duration of the timeout
1342 * @retval HAL status
1344 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
1346 uint32_t tickstart = 0;
1349 tickstart = HAL_GetTick();
1351 /* Wait until flag is set */
1354 while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
1356 if(Timeout != HAL_MAX_DELAY)
1358 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1360 /* Set the I2S State ready */
1361 hi2s->State= HAL_I2S_STATE_READY;
1363 /* Process Unlocked */
1373 while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
1375 if(Timeout != HAL_MAX_DELAY)
1377 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1379 /* Set the I2S State ready */
1380 hi2s->State= HAL_I2S_STATE_READY;
1382 /* Process Unlocked */
1405 #endif /* HAL_I2S_MODULE_ENABLED */
1406 #endif /* #if !defined(STM32L031xx) && !defined(STM32L041xx) */
1408 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/