tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.s

   1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
   2 ;* File Name          : startup_stm32f411xe.s
   3 ;* Author             : MCD Application Team
   4 ;* Version            : V2.1.0
   5 ;* Date               : 19-June-2014
   6 ;* Description        : STM32F411xExx devices vector table for MDK-ARM_MICRO toolchain.
   7 ;*                      This module performs:
   8 ;*                      - Set the initial SP
   9 ;*                      - Set the initial PC == Reset_Handler
  10 ;*                      - Set the vector table entries with the exceptions ISR address
  11 ;*                      - Branches to __main in the C library (which eventually
  12 ;*                        calls main()).
  13 ;*                      After Reset the CortexM4 processor is in Thread mode,
  14 ;*                      priority is Privileged, and the Stack is set to Main.
  15 ;* <<< Use Configuration Wizard in Context Menu >>>
  16 ;*******************************************************************************
  17 ;
  18 ;* Redistribution and use in source and binary forms, with or without modification,
  19 ;* are permitted provided that the following conditions are met:
  20 ;*   1. Redistributions of source code must retain the above copyright notice,
  21 ;*      this list of conditions and the following disclaimer.
  22 ;*   2. Redistributions in binary form must reproduce the above copyright notice,
  23 ;*      this list of conditions and the following disclaimer in the documentation
  24 ;*      and/or other materials provided with the distribution.
  25 ;*   3. Neither the name of STMicroelectronics nor the names of its contributors
  26 ;*      may be used to endorse or promote products derived from this software
  27 ;*      without specific prior written permission.
  28 ;*
  29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39 ;
  40 ;*******************************************************************************
  41
  42 ; Amount of memory (in bytes) allocated for Stack
  43 ; Tailor this value to your application needs
  44 ; <h> Stack Configuration
  45 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  46 ; </h>
  47
  48 Stack_Size      EQU     0x00000400
  49
  50                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  51                 EXPORT  __initial_sp
  52
  53 Stack_Mem       SPACE   Stack_Size
  54 __initial_sp    EQU     0x20020000 ; Top of RAM
  55
  56
  57 ; <h> Heap Configuration
  58 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  59 ; </h>
  60
  61 Heap_Size       EQU     0x00000400
  62
  63                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  64                 EXPORT  __heap_base
  65                 EXPORT  __heap_limit
  66
  67 __heap_base
  68 Heap_Mem        SPACE   Heap_Size
  69 __heap_limit    EQU (__initial_sp - Stack_Size)
  70
  71                 PRESERVE8
  72                 THUMB
  73
  74
  75 ; Vector Table Mapped to Address 0 at Reset
  76                 AREA    RESET, DATA, READONLY
  77                 EXPORT  __Vectors
  78                 EXPORT  __Vectors_End
  79                 EXPORT  __Vectors_Size
  80
  81 __Vectors       DCD     __initial_sp               ; Top of Stack
  82                 DCD     Reset_Handler              ; Reset Handler
  83                 DCD     NMI_Handler                ; NMI Handler
  84                 DCD     HardFault_Handler          ; Hard Fault Handler
  85                 DCD     MemManage_Handler          ; MPU Fault Handler
  86                 DCD     BusFault_Handler           ; Bus Fault Handler
  87                 DCD     UsageFault_Handler         ; Usage Fault Handler
  88                 DCD     0                          ; Reserved
  89                 DCD     0                          ; Reserved
  90                 DCD     0                          ; Reserved
  91                 DCD     0                          ; Reserved
  92                 DCD     SVC_Handler                ; SVCall Handler
  93                 DCD     DebugMon_Handler           ; Debug Monitor Handler
  94                 DCD     0                          ; Reserved
  95                 DCD     PendSV_Handler             ; PendSV Handler
  96                 DCD     SysTick_Handler            ; SysTick Handler
  97
  98                 ; External Interrupts
  99                 DCD     WWDG_IRQHandler                   ; Window WatchDog
 100                 DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
 101                 DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
 102                 DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
 103                 DCD     FLASH_IRQHandler                  ; FLASH
 104                 DCD     RCC_IRQHandler                    ; RCC
 105                 DCD     EXTI0_IRQHandler                  ; EXTI Line0
 106                 DCD     EXTI1_IRQHandler                  ; EXTI Line1
 107                 DCD     EXTI2_IRQHandler                  ; EXTI Line2
 108                 DCD     EXTI3_IRQHandler                  ; EXTI Line3
 109                 DCD     EXTI4_IRQHandler                  ; EXTI Line4
 110                 DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
 111                 DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1
 112                 DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2
 113                 DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3
 114                 DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4
 115                 DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5
 116                 DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6
 117                 DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s
 118                 DCD     0                                 ; Reserved
 119                 DCD     0                                 ; Reserved
 120                 DCD     0                                 ; Reserved
 121                 DCD     0                                 ; Reserved
 122                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
 123                 DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9
 124                 DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10
 125                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
 126                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
 127                 DCD     TIM2_IRQHandler                   ; TIM2
 128                 DCD     TIM3_IRQHandler                   ; TIM3
 129                 DCD     TIM4_IRQHandler                   ; TIM4
 130                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
 131                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
 132                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
 133                 DCD     I2C2_ER_IRQHandler                ; I2C2 Error
 134                 DCD     SPI1_IRQHandler                   ; SPI1
 135                 DCD     SPI2_IRQHandler                   ; SPI2
 136                 DCD     USART1_IRQHandler                 ; USART1
 137                 DCD     USART2_IRQHandler                 ; USART2
 138                 DCD     0                                 ; Reserved
 139                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
 140                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
 141                 DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line
 142                 DCD     0                                 ; Reserved
 143                 DCD     0                                 ; Reserved
 144                 DCD     0                                 ; Reserved
 145                 DCD     0                                 ; Reserved
 146                 DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7
 147                 DCD     0                                 ; Reserved
 148                 DCD     SDIO_IRQHandler                   ; SDIO
 149                 DCD     TIM5_IRQHandler                   ; TIM5
 150                 DCD     SPI3_IRQHandler                   ; SPI3
 151                 DCD     0                                 ; Reserved
 152                 DCD     0                                 ; Reserved
 153                 DCD     0                                 ; Reserved
 154                 DCD     0                                 ; Reserved
 155                 DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0
 156                 DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1
 157                 DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2
 158                 DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3
 159                 DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
 160                 DCD     0                                 ; Reserved
 161                 DCD     0                                 ; Reserved
 162                 DCD     0                                 ; Reserved
 163                 DCD     0                                 ; Reserved
 164                 DCD     0                                 ; Reserved
 165                 DCD     0                                 ; Reserved
 166                 DCD     OTG_FS_IRQHandler                 ; USB OTG FS
 167                 DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5
 168                 DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6
 169                 DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7
 170                 DCD     USART6_IRQHandler                 ; USART6
 171                 DCD     I2C3_EV_IRQHandler                ; I2C3 event
 172                 DCD     I2C3_ER_IRQHandler                ; I2C3 error
 173                 DCD     0                                 ; Reserved
 174                 DCD     0                                 ; Reserved
 175                 DCD     0                                 ; Reserved
 176                 DCD     0                                 ; Reserved
 177                 DCD     0                                 ; Reserved
 178                 DCD     0                                 ; Reserved
 179                 DCD     0                                 ; Reserved
 180                 DCD     FPU_IRQHandler                    ; FPU
 181                 DCD     0                                 ; Reserved
 182                 DCD     0                                 ; Reserved
 183                 DCD     SPI4_IRQHandler                   ; SPI4
 184                 DCD     SPI5_IRQHandler                   ; SPI5
 185
 186 __Vectors_End
 187
 188 __Vectors_Size  EQU  __Vectors_End - __Vectors
 189
 190                 AREA    |.text|, CODE, READONLY
 191
 192 ; Reset handler
 193 Reset_Handler    PROC
 194                  EXPORT  Reset_Handler             [WEAK]
 195         IMPORT  SystemInit
 196         IMPORT  __main
 197
 198                  LDR     R0, =SystemInit
 199                  BLX     R0
 200                  LDR     R0, =__main
 201                  BX      R0
 202                  ENDP
 203
 204 ; Dummy Exception Handlers (infinite loops which can be modified)
 205
 206 NMI_Handler     PROC
 207                 EXPORT  NMI_Handler                [WEAK]
 208                 B       .
 209                 ENDP
 210 HardFault_Handler\
 211                 PROC
 212                 EXPORT  HardFault_Handler          [WEAK]
 213                 B       .
 214                 ENDP
 215 MemManage_Handler\
 216                 PROC
 217                 EXPORT  MemManage_Handler          [WEAK]
 218                 B       .
 219                 ENDP
 220 BusFault_Handler\
 221                 PROC
 222                 EXPORT  BusFault_Handler           [WEAK]
 223                 B       .
 224                 ENDP
 225 UsageFault_Handler\
 226                 PROC
 227                 EXPORT  UsageFault_Handler         [WEAK]
 228                 B       .
 229                 ENDP
 230 SVC_Handler     PROC
 231                 EXPORT  SVC_Handler                [WEAK]
 232                 B       .
 233                 ENDP
 234 DebugMon_Handler\
 235                 PROC
 236                 EXPORT  DebugMon_Handler           [WEAK]
 237                 B       .
 238                 ENDP
 239 PendSV_Handler  PROC
 240                 EXPORT  PendSV_Handler             [WEAK]
 241                 B       .
 242                 ENDP
 243 SysTick_Handler PROC
 244                 EXPORT  SysTick_Handler            [WEAK]
 245                 B       .
 246                 ENDP
 247
 248 Default_Handler PROC
 249
 250                 EXPORT  WWDG_IRQHandler                   [WEAK]
 251                 EXPORT  PVD_IRQHandler                    [WEAK]
 252                 EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
 253                 EXPORT  RTC_WKUP_IRQHandler               [WEAK]
 254                 EXPORT  FLASH_IRQHandler                  [WEAK]
 255                 EXPORT  RCC_IRQHandler                    [WEAK]
 256                 EXPORT  EXTI0_IRQHandler                  [WEAK]
 257                 EXPORT  EXTI1_IRQHandler                  [WEAK]
 258                 EXPORT  EXTI2_IRQHandler                  [WEAK]
 259                 EXPORT  EXTI3_IRQHandler                  [WEAK]
 260                 EXPORT  EXTI4_IRQHandler                  [WEAK]
 261                 EXPORT  DMA1_Stream0_IRQHandler           [WEAK]
 262                 EXPORT  DMA1_Stream1_IRQHandler           [WEAK]
 263                 EXPORT  DMA1_Stream2_IRQHandler           [WEAK]
 264                 EXPORT  DMA1_Stream3_IRQHandler           [WEAK]
 265                 EXPORT  DMA1_Stream4_IRQHandler           [WEAK]
 266                 EXPORT  DMA1_Stream5_IRQHandler           [WEAK]
 267                 EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
 268                 EXPORT  ADC_IRQHandler                    [WEAK]
 269                 EXPORT  EXTI9_5_IRQHandler                [WEAK]
 270                 EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]
 271                 EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]
 272                 EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK]
 273                 EXPORT  TIM1_CC_IRQHandler                [WEAK]
 274                 EXPORT  TIM2_IRQHandler                   [WEAK]
 275                 EXPORT  TIM3_IRQHandler                   [WEAK]
 276                 EXPORT  TIM4_IRQHandler                   [WEAK]
 277                 EXPORT  I2C1_EV_IRQHandler                [WEAK]
 278                 EXPORT  I2C1_ER_IRQHandler                [WEAK]
 279                 EXPORT  I2C2_EV_IRQHandler                [WEAK]
 280                 EXPORT  I2C2_ER_IRQHandler                [WEAK]
 281                 EXPORT  SPI1_IRQHandler                   [WEAK]
 282                 EXPORT  SPI2_IRQHandler                   [WEAK]
 283                 EXPORT  USART1_IRQHandler                 [WEAK]
 284                 EXPORT  USART2_IRQHandler                 [WEAK]
 285                 EXPORT  EXTI15_10_IRQHandler              [WEAK]
 286                 EXPORT  RTC_Alarm_IRQHandler              [WEAK]
 287                 EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]
 288                 EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
 289                 EXPORT  SDIO_IRQHandler                   [WEAK]
 290                 EXPORT  TIM5_IRQHandler                   [WEAK]
 291                 EXPORT  SPI3_IRQHandler                   [WEAK]
 292                 EXPORT  DMA2_Stream0_IRQHandler           [WEAK]
 293                 EXPORT  DMA2_Stream1_IRQHandler           [WEAK]
 294                 EXPORT  DMA2_Stream2_IRQHandler           [WEAK]
 295                 EXPORT  DMA2_Stream3_IRQHandler           [WEAK]
 296                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 297                 EXPORT  OTG_FS_IRQHandler                 [WEAK]
 298                 EXPORT  DMA2_Stream5_IRQHandler           [WEAK]
 299                 EXPORT  DMA2_Stream6_IRQHandler           [WEAK]
 300                 EXPORT  DMA2_Stream7_IRQHandler           [WEAK]
 301                 EXPORT  USART6_IRQHandler                 [WEAK]
 302                 EXPORT  I2C3_EV_IRQHandler                [WEAK]
 303                 EXPORT  I2C3_ER_IRQHandler                [WEAK]
 304                 EXPORT  FPU_IRQHandler                    [WEAK]
 305                 EXPORT  SPI4_IRQHandler                   [WEAK]
 306                 EXPORT  SPI5_IRQHandler                   [WEAK]
 307
 308 WWDG_IRQHandler
 309 PVD_IRQHandler
 310 TAMP_STAMP_IRQHandler
 311 RTC_WKUP_IRQHandler
 312 FLASH_IRQHandler
 313 RCC_IRQHandler
 314 EXTI0_IRQHandler
 315 EXTI1_IRQHandler
 316 EXTI2_IRQHandler
 317 EXTI3_IRQHandler
 318 EXTI4_IRQHandler
 319 DMA1_Stream0_IRQHandler
 320 DMA1_Stream1_IRQHandler
 321 DMA1_Stream2_IRQHandler
 322 DMA1_Stream3_IRQHandler
 323 DMA1_Stream4_IRQHandler
 324 DMA1_Stream5_IRQHandler
 325 DMA1_Stream6_IRQHandler
 326 ADC_IRQHandler
 327 EXTI9_5_IRQHandler
 328 TIM1_BRK_TIM9_IRQHandler
 329 TIM1_UP_TIM10_IRQHandler
 330 TIM1_TRG_COM_TIM11_IRQHandler
 331 TIM1_CC_IRQHandler
 332 TIM2_IRQHandler
 333 TIM3_IRQHandler
 334 TIM4_IRQHandler
 335 I2C1_EV_IRQHandler
 336 I2C1_ER_IRQHandler
 337 I2C2_EV_IRQHandler
 338 I2C2_ER_IRQHandler
 339 SPI1_IRQHandler
 340 SPI2_IRQHandler
 341 USART1_IRQHandler
 342 USART2_IRQHandler
 343 EXTI15_10_IRQHandler
 344 RTC_Alarm_IRQHandler
 345 OTG_FS_WKUP_IRQHandler
 346 DMA1_Stream7_IRQHandler
 347 SDIO_IRQHandler
 348 TIM5_IRQHandler
 349 SPI3_IRQHandler
 350 DMA2_Stream0_IRQHandler
 351 DMA2_Stream1_IRQHandler
 352 DMA2_Stream2_IRQHandler
 353 DMA2_Stream3_IRQHandler
 354 DMA2_Stream4_IRQHandler
 355 OTG_FS_IRQHandler
 356 DMA2_Stream5_IRQHandler
 357 DMA2_Stream6_IRQHandler
 358 DMA2_Stream7_IRQHandler
 359 USART6_IRQHandler
 360 I2C3_EV_IRQHandler
 361 I2C3_ER_IRQHandler
 362 FPU_IRQHandler
 363 SPI4_IRQHandler
 364 SPI5_IRQHandler
 365
 366                 B       .
 367
 368                 ENDP
 369
 370                 ALIGN
 371                 END
 372
 373 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****