tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F401VC/TOOLCHAIN_GCC_ARM/startup_stm32f401xc.s

   1 /**
   2   ******************************************************************************
   3   * @file      startup_stm32f401xc.s
   4   * @author    MCD Application Team
   5   * @version   V2.1.0
   6   * @date      19-June-2014
   7   * @brief     STM32F401xCxx Devices vector table for Atollic TrueSTUDIO toolchain.
   8   *            This module performs:
   9   *                - Set the initial SP
  10   *                - Set the initial PC == Reset_Handler,
  11   *                - Set the vector table entries with the exceptions ISR address
  12   *                - Branches to main in the C library (which eventually
  13   *                  calls main()).
  14   *            After Reset the Cortex-M4 processor is in Thread mode,
  15   *            priority is Privileged, and the Stack is set to Main.
  16   ******************************************************************************
  17   * @attention
  18   *
  19   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  20   *
  21   * Redistribution and use in source and binary forms, with or without modification,
  22   * are permitted provided that the following conditions are met:
  23   *   1. Redistributions of source code must retain the above copyright notice,
  24   *      this list of conditions and the following disclaimer.
  25   *   2. Redistributions in binary form must reproduce the above copyright notice,
  26   *      this list of conditions and the following disclaimer in the documentation
  27   *      and/or other materials provided with the distribution.
  28   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  29   *      may be used to endorse or promote products derived from this software
  30   *      without specific prior written permission.
  31   *
  32   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  33   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  34   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  36   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  38   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  39   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  40   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  41   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42   *
  43   ******************************************************************************
  44   */
  45
  46   .syntax unified
  47   .cpu cortex-m4
  48   .fpu softvfp
  49   .thumb
  50
  51 .global  g_pfnVectors
  52 .global  Default_Handler
  53
  54 /* start address for the initialization values of the .data section.
  55 defined in linker script */
  56 .word  _sidata
  57 /* start address for the .data section. defined in linker script */
  58 .word  _sdata
  59 /* end address for the .data section. defined in linker script */
  60 .word  _edata
  61 /* start address for the .bss section. defined in linker script */
  62 .word  _sbss
  63 /* end address for the .bss section. defined in linker script */
  64 .word  _ebss
  65 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  66
  67 /**
  68  * @brief  This is the code that gets called when the processor first
  69  *          starts execution following a reset event. Only the absolutely
  70  *          necessary set is performed, after which the application
  71  *          supplied main() routine is called.
  72  * @param  None
  73  * @retval : None
  74 */
  75
  76     .section  .text.Reset_Handler
  77   .weak  Reset_Handler
  78   .type  Reset_Handler, %function
  79 Reset_Handler:
  80   ldr   sp, =_estack      /* set stack pointer */
  81
  82 /* Copy the data segment initializers from flash to SRAM */
  83   movs  r1, #0
  84   b  LoopCopyDataInit
  85
  86 CopyDataInit:
  87   ldr  r3, =_sidata
  88   ldr  r3, [r3, r1]
  89   str  r3, [r0, r1]
  90   adds  r1, r1, #4
  91
  92 LoopCopyDataInit:
  93   ldr  r0, =_sdata
  94   ldr  r3, =_edata
  95   adds  r2, r0, r1
  96   cmp  r2, r3
  97   bcc  CopyDataInit
  98   ldr  r2, =_sbss
  99   b  LoopFillZerobss
 100 /* Zero fill the bss segment. */
 101 FillZerobss:
 102   movs  r3, #0
 103   str  r3, [r2], #4
 104
 105 LoopFillZerobss:
 106   ldr  r3, = _ebss
 107   cmp  r2, r3
 108   bcc  FillZerobss
 109
 110 /* Call the clock system intitialization function.*/
 111   bl  SystemInit
 112 /* Call static constructors */
 113   //bl __libc_init_array
 114 /* Call the application's entry point.*/
 115   //bl  main
 116   // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
 117   // and when existing hardware_init_hook() and software_init_hook() before
 118   // starting main(). software_init_hook() is available and has to be called due
 119   // to initializsation when using rtos.
 120   bl _start
 121   bx  lr
 122 .size  Reset_Handler, .-Reset_Handler
 123
 124 /**
 125  * @brief  This is the code that gets called when the processor receives an
 126  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 127  *         the system state for examination by a debugger.
 128  * @param  None
 129  * @retval None
 130 */
 131     .section  .text.Default_Handler,"ax",%progbits
 132 Default_Handler:
 133 Infinite_Loop:
 134   b  Infinite_Loop
 135   .size  Default_Handler, .-Default_Handler
 136 /******************************************************************************
 137 *
 138 * The minimal vector table for a Cortex M3. Note that the proper constructs
 139 * must be placed on this to ensure that it ends up at physical address
 140 * 0x0000.0000.
 141 *
 142 *******************************************************************************/
 143    .section  .isr_vector,"a",%progbits
 144   .type  g_pfnVectors, %object
 145   .size  g_pfnVectors, .-g_pfnVectors
 146
 147 g_pfnVectors:
 148   .word  _estack
 149   .word  Reset_Handler
 150   .word  NMI_Handler
 151   .word  HardFault_Handler
 152   .word  MemManage_Handler
 153   .word  BusFault_Handler
 154   .word  UsageFault_Handler
 155   .word  0
 156   .word  0
 157   .word  0
 158   .word  0
 159   .word  SVC_Handler
 160   .word  DebugMon_Handler
 161   .word  0
 162   .word  PendSV_Handler
 163   .word  SysTick_Handler
 164
 165   /* External Interrupts */
 166   .word     WWDG_IRQHandler                   /* Window WatchDog              */
 167   .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
 168   .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
 169   .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
 170   .word     FLASH_IRQHandler                  /* FLASH                        */
 171   .word     RCC_IRQHandler                    /* RCC                          */
 172   .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
 173   .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
 174   .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
 175   .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
 176   .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
 177   .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
 178   .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
 179   .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
 180   .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
 181   .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
 182   .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
 183   .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
 184   .word     ADC_IRQHandler                    /* ADC1                         */
 185   .word     0                                                     /* Reserved                     */
 186   .word     0                                                             /* Reserved                     */
 187   .word     0                                 /* Reserved                     */
 188   .word     0                                 /* Reserved                     */
 189   .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
 190   .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */
 191   .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */
 192   .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
 193   .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
 194   .word     TIM2_IRQHandler                   /* TIM2                         */
 195   .word     TIM3_IRQHandler                   /* TIM3                         */
 196   .word     TIM4_IRQHandler                   /* TIM4                         */
 197   .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
 198   .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
 199   .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
 200   .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
 201   .word     SPI1_IRQHandler                   /* SPI1                         */
 202   .word     SPI2_IRQHandler                   /* SPI2                         */
 203   .word     USART1_IRQHandler                 /* USART1                       */
 204   .word     USART2_IRQHandler                 /* USART2                       */
 205   .word     0                                                     /* Reserved                     */
 206   .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
 207   .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
 208   .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */
 209   .word     0                                 /* Reserved                                       */
 210   .word     0                                 /* Reserved                                       */
 211   .word     0                                 /* Reserved                                                 */
 212   .word     0                                 /* Reserved                     */
 213   .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
 214   .word     0                                 /* Reserved                     */
 215   .word     SDIO_IRQHandler                   /* SDIO                         */
 216   .word     TIM5_IRQHandler                   /* TIM5                         */
 217   .word     SPI3_IRQHandler                   /* SPI3                         */
 218   .word     0                                 /* Reserved                     */
 219   .word     0                                 /* Reserved                     */
 220   .word     0                                 /* Reserved                     */
 221   .word     0                                 /* Reserved                     */
 222   .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
 223   .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
 224   .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
 225   .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
 226   .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
 227   .word     0                                                   /* Reserved                     */
 228   .word     0                                                             /* Reserved                     */
 229   .word     0                                                             /* Reserved                     */
 230   .word     0                                                             /* Reserved                     */
 231   .word     0                                                             /* Reserved                     */
 232   .word     0                                                             /* Reserved                     */
 233   .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */
 234   .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
 235   .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
 236   .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
 237   .word     USART6_IRQHandler                 /* USART6                       */
 238   .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
 239   .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
 240   .word     0                                 /* Reserved                     */
 241   .word     0                                 /* Reserved                     */
 242   .word     0                                 /* Reserved                     */
 243   .word     0                                 /* Reserved                     */
 244   .word     0                                 /* Reserved                     */
 245   .word     0                                 /* Reserved                     */
 246   .word     0                                 /* Reserved                     */
 247   .word     FPU_IRQHandler                    /* FPU                          */
 248   .word     0                                 /* Reserved                     */
 249   .word     0                                 /* Reserved                     */
 250   .word     SPI4_IRQHandler                   /* SPI4                         */
 251
 252 /*******************************************************************************
 253 *
 254 * Provide weak aliases for each Exception handler to the Default_Handler.
 255 * As they are weak aliases, any function with the same name will override
 256 * this definition.
 257 *
 258 *******************************************************************************/
 259    .weak      NMI_Handler
 260    .thumb_set NMI_Handler,Default_Handler
 261
 262    .weak      HardFault_Handler
 263    .thumb_set HardFault_Handler,Default_Handler
 264
 265    .weak      MemManage_Handler
 266    .thumb_set MemManage_Handler,Default_Handler
 267
 268    .weak      BusFault_Handler
 269    .thumb_set BusFault_Handler,Default_Handler
 270
 271    .weak      UsageFault_Handler
 272    .thumb_set UsageFault_Handler,Default_Handler
 273
 274    .weak      SVC_Handler
 275    .thumb_set SVC_Handler,Default_Handler
 276
 277    .weak      DebugMon_Handler
 278    .thumb_set DebugMon_Handler,Default_Handler
 279
 280    .weak      PendSV_Handler
 281    .thumb_set PendSV_Handler,Default_Handler
 282
 283    .weak      SysTick_Handler
 284    .thumb_set SysTick_Handler,Default_Handler
 285
 286    .weak      WWDG_IRQHandler
 287    .thumb_set WWDG_IRQHandler,Default_Handler
 288
 289    .weak      PVD_IRQHandler
 290    .thumb_set PVD_IRQHandler,Default_Handler
 291
 292    .weak      TAMP_STAMP_IRQHandler
 293    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 294
 295    .weak      RTC_WKUP_IRQHandler
 296    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
 297
 298    .weak      FLASH_IRQHandler
 299    .thumb_set FLASH_IRQHandler,Default_Handler
 300
 301    .weak      RCC_IRQHandler
 302    .thumb_set RCC_IRQHandler,Default_Handler
 303
 304    .weak      EXTI0_IRQHandler
 305    .thumb_set EXTI0_IRQHandler,Default_Handler
 306
 307    .weak      EXTI1_IRQHandler
 308    .thumb_set EXTI1_IRQHandler,Default_Handler
 309
 310    .weak      EXTI2_IRQHandler
 311    .thumb_set EXTI2_IRQHandler,Default_Handler
 312
 313    .weak      EXTI3_IRQHandler
 314    .thumb_set EXTI3_IRQHandler,Default_Handler
 315
 316    .weak      EXTI4_IRQHandler
 317    .thumb_set EXTI4_IRQHandler,Default_Handler
 318
 319    .weak      DMA1_Stream0_IRQHandler
 320    .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
 321
 322    .weak      DMA1_Stream1_IRQHandler
 323    .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
 324
 325    .weak      DMA1_Stream2_IRQHandler
 326    .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
 327
 328    .weak      DMA1_Stream3_IRQHandler
 329    .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
 330
 331    .weak      DMA1_Stream4_IRQHandler
 332    .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
 333
 334    .weak      DMA1_Stream5_IRQHandler
 335    .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
 336
 337    .weak      DMA1_Stream6_IRQHandler
 338    .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
 339
 340    .weak      ADC_IRQHandler
 341    .thumb_set ADC_IRQHandler,Default_Handler
 342
 343    .weak      EXTI9_5_IRQHandler
 344    .thumb_set EXTI9_5_IRQHandler,Default_Handler
 345
 346    .weak      TIM1_BRK_TIM9_IRQHandler
 347    .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
 348
 349    .weak      TIM1_UP_TIM10_IRQHandler
 350    .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
 351
 352    .weak      TIM1_TRG_COM_TIM11_IRQHandler
 353    .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
 354
 355    .weak      TIM1_CC_IRQHandler
 356    .thumb_set TIM1_CC_IRQHandler,Default_Handler
 357
 358    .weak      TIM2_IRQHandler
 359    .thumb_set TIM2_IRQHandler,Default_Handler
 360
 361    .weak      TIM3_IRQHandler
 362    .thumb_set TIM3_IRQHandler,Default_Handler
 363
 364    .weak      TIM4_IRQHandler
 365    .thumb_set TIM4_IRQHandler,Default_Handler
 366
 367    .weak      I2C1_EV_IRQHandler
 368    .thumb_set I2C1_EV_IRQHandler,Default_Handler
 369
 370    .weak      I2C1_ER_IRQHandler
 371    .thumb_set I2C1_ER_IRQHandler,Default_Handler
 372
 373    .weak      I2C2_EV_IRQHandler
 374    .thumb_set I2C2_EV_IRQHandler,Default_Handler
 375
 376    .weak      I2C2_ER_IRQHandler
 377    .thumb_set I2C2_ER_IRQHandler,Default_Handler
 378
 379    .weak      SPI1_IRQHandler
 380    .thumb_set SPI1_IRQHandler,Default_Handler
 381
 382    .weak      SPI2_IRQHandler
 383    .thumb_set SPI2_IRQHandler,Default_Handler
 384
 385    .weak      USART1_IRQHandler
 386    .thumb_set USART1_IRQHandler,Default_Handler
 387
 388    .weak      USART2_IRQHandler
 389    .thumb_set USART2_IRQHandler,Default_Handler
 390
 391    .weak      EXTI15_10_IRQHandler
 392    .thumb_set EXTI15_10_IRQHandler,Default_Handler
 393
 394    .weak      RTC_Alarm_IRQHandler
 395    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 396
 397    .weak      OTG_FS_WKUP_IRQHandler
 398    .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 399
 400    .weak      DMA1_Stream7_IRQHandler
 401    .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
 402
 403    .weak      SDIO_IRQHandler
 404    .thumb_set SDIO_IRQHandler,Default_Handler
 405
 406    .weak      TIM5_IRQHandler
 407    .thumb_set TIM5_IRQHandler,Default_Handler
 408
 409    .weak      SPI3_IRQHandler
 410    .thumb_set SPI3_IRQHandler,Default_Handler
 411
 412    .weak      DMA2_Stream0_IRQHandler
 413    .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
 414
 415    .weak      DMA2_Stream1_IRQHandler
 416    .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
 417
 418    .weak      DMA2_Stream2_IRQHandler
 419    .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
 420
 421    .weak      DMA2_Stream3_IRQHandler
 422    .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
 423
 424    .weak      DMA2_Stream4_IRQHandler
 425    .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
 426
 427    .weak      OTG_FS_IRQHandler
 428    .thumb_set OTG_FS_IRQHandler,Default_Handler
 429
 430    .weak      DMA2_Stream5_IRQHandler
 431    .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
 432
 433    .weak      DMA2_Stream6_IRQHandler
 434    .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
 435
 436    .weak      DMA2_Stream7_IRQHandler
 437    .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
 438
 439    .weak      USART6_IRQHandler
 440    .thumb_set USART6_IRQHandler,Default_Handler
 441
 442    .weak      I2C3_EV_IRQHandler
 443    .thumb_set I2C3_EV_IRQHandler,Default_Handler
 444
 445    .weak      I2C3_ER_IRQHandler
 446    .thumb_set I2C3_ER_IRQHandler,Default_Handler
 447
 448    .weak      FPU_IRQHandler
 449    .thumb_set FPU_IRQHandler,Default_Handler
 450
 451    .weak      SPI4_IRQHandler
 452    .thumb_set SPI4_IRQHandler,Default_Handler
 453
 454 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 455