tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/startup_stm32f030x8.s

   1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
   2 ;* File Name          : startup_stm32f030x8.s
   3 ;* Author             : MCD Application Team
   4 ;* Version            : V2.1.0
   5 ;* Date               : 03-Oct-2014
   6 ;* Description        : STM32F030x8 devices vector table for EWARM toolchain.
   7 ;*                      This module performs:
   8 ;*                      - Set the initial SP
   9 ;*                      - Set the initial PC == __iar_program_start,
  10 ;*                      - Set the vector table entries with the exceptions ISR
  11 ;*                        address,
  12 ;*                      - Branches to main in the C library (which eventually
  13 ;*                        calls main()).
  14 ;*                      After Reset the Cortex-M0 processor is in Thread mode,
  15 ;*                      priority is Privileged, and the Stack is set to Main.
  16 ;*******************************************************************************
  17 ;*
  18 ;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  19 ;*
  20 ;* Redistribution and use in source and binary forms, with or without modification,
  21 ;* are permitted provided that the following conditions are met:
  22 ;*   1. Redistributions of source code must retain the above copyright notice,
  23 ;*      this list of conditions and the following disclaimer.
  24 ;*   2. Redistributions in binary form must reproduce the above copyright notice,
  25 ;*      this list of conditions and the following disclaimer in the documentation
  26 ;*      and/or other materials provided with the distribution.
  27 ;*   3. Neither the name of STMicroelectronics nor the names of its contributors
  28 ;*      may be used to endorse or promote products derived from this software
  29 ;*      without specific prior written permission.
  30 ;*
  31 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  32 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  33 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  34 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  35 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  36 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  37 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  38 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  39 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  40 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  41 ;*
  42 ;*******************************************************************************
  43 ;
  44 ;
  45 ; The modules in this file are included in the libraries, and may be replaced
  46 ; by any user-defined modules that define the PUBLIC symbol _program_start or
  47 ; a user defined start symbol.
  48 ; To override the cstartup defined in the library, simply add your modified
  49 ; version to the workbench project.
  50 ;
  51 ; The vector table is normally located at address 0.
  52 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  53 ; The name "__vector_table" has special meaning for C-SPY:
  54 ; it is where the SP start value is found, and the NVIC vector
  55 ; table register (VTOR) is initialized to this address if != 0.
  56 ;
  57 ; Cortex-M version
  58 ;
  59
  60         MODULE  ?cstartup
  61
  62         ;; Forward declaration of sections.
  63         SECTION CSTACK:DATA:NOROOT(3)
  64
  65         SECTION .intvec:CODE:NOROOT(2)
  66
  67         EXTERN  __iar_program_start
  68         EXTERN  SystemInit
  69         PUBLIC  __vector_table
  70
  71         DATA
  72 __vector_table
  73         DCD     sfe(CSTACK)
  74         DCD     Reset_Handler                  ; Reset Handler
  75
  76         DCD     NMI_Handler                    ; NMI Handler
  77         DCD     HardFault_Handler              ; Hard Fault Handler
  78         DCD     0                              ; Reserved
  79         DCD     0                              ; Reserved
  80         DCD     0                              ; Reserved
  81         DCD     0                              ; Reserved
  82         DCD     0                              ; Reserved
  83         DCD     0                              ; Reserved
  84         DCD     0                              ; Reserved
  85         DCD     SVC_Handler                    ; SVCall Handler
  86         DCD     0                              ; Reserved
  87         DCD     0                              ; Reserved
  88         DCD     PendSV_Handler                 ; PendSV Handler
  89         DCD     SysTick_Handler                ; SysTick Handler
  90
  91         ; External Interrupts
  92         DCD     WWDG_IRQHandler                ; Window Watchdog
  93         DCD     0                              ; Reserved
  94         DCD     RTC_IRQHandler                 ; RTC through EXTI Line
  95         DCD     FLASH_IRQHandler               ; FLASH
  96         DCD     RCC_IRQHandler                 ; RCC
  97         DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
  98         DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
  99         DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
 100         DCD     0                              ; Reserved
 101         DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
 102         DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
 103         DCD     DMA1_Channel4_5_IRQHandler     ; DMA1 Channel 4 and Channel 5
 104         DCD     ADC1_IRQHandler                ; ADC1
 105         DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
 106         DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
 107         DCD     0                              ; Reserved
 108         DCD     TIM3_IRQHandler                ; TIM3
 109         DCD     TIM6_IRQHandler                ; TIM6
 110         DCD     0                              ; Reserved
 111         DCD     TIM14_IRQHandler               ; TIM14
 112         DCD     TIM15_IRQHandler               ; TIM15
 113         DCD     TIM16_IRQHandler               ; TIM16
 114         DCD     TIM17_IRQHandler               ; TIM17
 115         DCD     I2C1_IRQHandler                ; I2C1
 116         DCD     I2C2_IRQHandler                ; I2C2
 117         DCD     SPI1_IRQHandler                ; SPI1
 118         DCD     SPI2_IRQHandler                ; SPI2
 119         DCD     USART1_IRQHandler              ; USART1
 120         DCD     USART2_IRQHandler              ; USART2
 121
 122
 123
 124 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 125 ;;
 126 ;; Default interrupt handlers.
 127 ;;
 128         THUMB
 129
 130         PUBWEAK Reset_Handler
 131         SECTION .text:CODE:NOROOT:REORDER(2)
 132 Reset_Handler
 133         LDR     R0, =SystemInit
 134         BLX     R0
 135         LDR     R0, =__iar_program_start
 136         BX      R0
 137
 138         PUBWEAK NMI_Handler
 139         SECTION .text:CODE:NOROOT:REORDER(1)
 140 NMI_Handler
 141         B NMI_Handler
 142
 143         PUBWEAK HardFault_Handler
 144         SECTION .text:CODE:NOROOT:REORDER(1)
 145 HardFault_Handler
 146         B HardFault_Handler
 147
 148         PUBWEAK SVC_Handler
 149         SECTION .text:CODE:NOROOT:REORDER(1)
 150 SVC_Handler
 151         B SVC_Handler
 152
 153         PUBWEAK PendSV_Handler
 154         SECTION .text:CODE:NOROOT:REORDER(1)
 155 PendSV_Handler
 156         B PendSV_Handler
 157
 158         PUBWEAK SysTick_Handler
 159         SECTION .text:CODE:NOROOT:REORDER(1)
 160 SysTick_Handler
 161         B SysTick_Handler
 162
 163         PUBWEAK WWDG_IRQHandler
 164         SECTION .text:CODE:NOROOT:REORDER(1)
 165 WWDG_IRQHandler
 166         B WWDG_IRQHandler
 167
 168         PUBWEAK RTC_IRQHandler
 169         SECTION .text:CODE:NOROOT:REORDER(1)
 170 RTC_IRQHandler
 171         B RTC_IRQHandler
 172
 173         PUBWEAK FLASH_IRQHandler
 174         SECTION .text:CODE:NOROOT:REORDER(1)
 175 FLASH_IRQHandler
 176         B FLASH_IRQHandler
 177
 178         PUBWEAK RCC_IRQHandler
 179         SECTION .text:CODE:NOROOT:REORDER(1)
 180 RCC_IRQHandler
 181         B RCC_IRQHandler
 182
 183         PUBWEAK EXTI0_1_IRQHandler
 184         SECTION .text:CODE:NOROOT:REORDER(1)
 185 EXTI0_1_IRQHandler
 186         B EXTI0_1_IRQHandler
 187
 188         PUBWEAK EXTI2_3_IRQHandler
 189         SECTION .text:CODE:NOROOT:REORDER(1)
 190 EXTI2_3_IRQHandler
 191         B EXTI2_3_IRQHandler
 192
 193         PUBWEAK EXTI4_15_IRQHandler
 194         SECTION .text:CODE:NOROOT:REORDER(1)
 195 EXTI4_15_IRQHandler
 196         B EXTI4_15_IRQHandler
 197
 198         PUBWEAK DMA1_Channel1_IRQHandler
 199         SECTION .text:CODE:NOROOT:REORDER(1)
 200 DMA1_Channel1_IRQHandler
 201         B DMA1_Channel1_IRQHandler
 202
 203         PUBWEAK DMA1_Channel2_3_IRQHandler
 204         SECTION .text:CODE:NOROOT:REORDER(1)
 205 DMA1_Channel2_3_IRQHandler
 206         B DMA1_Channel2_3_IRQHandler
 207
 208         PUBWEAK DMA1_Channel4_5_IRQHandler
 209         SECTION .text:CODE:NOROOT:REORDER(1)
 210 DMA1_Channel4_5_IRQHandler
 211         B DMA1_Channel4_5_IRQHandler
 212
 213         PUBWEAK ADC1_IRQHandler
 214         SECTION .text:CODE:NOROOT:REORDER(1)
 215 ADC1_IRQHandler
 216         B ADC1_IRQHandler
 217
 218         PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
 219         SECTION .text:CODE:NOROOT:REORDER(1)
 220 TIM1_BRK_UP_TRG_COM_IRQHandler
 221         B TIM1_BRK_UP_TRG_COM_IRQHandler
 222
 223         PUBWEAK TIM1_CC_IRQHandler
 224         SECTION .text:CODE:NOROOT:REORDER(1)
 225 TIM1_CC_IRQHandler
 226         B TIM1_CC_IRQHandler
 227
 228         PUBWEAK TIM3_IRQHandler
 229         SECTION .text:CODE:NOROOT:REORDER(1)
 230 TIM3_IRQHandler
 231         B TIM3_IRQHandler
 232
 233         PUBWEAK TIM6_IRQHandler
 234         SECTION .text:CODE:NOROOT:REORDER(1)
 235 TIM6_IRQHandler
 236         B TIM6_IRQHandler
 237
 238         PUBWEAK TIM14_IRQHandler
 239         SECTION .text:CODE:NOROOT:REORDER(1)
 240 TIM14_IRQHandler
 241         B TIM14_IRQHandler
 242
 243         PUBWEAK TIM15_IRQHandler
 244         SECTION .text:CODE:NOROOT:REORDER(1)
 245 TIM15_IRQHandler
 246         B TIM15_IRQHandler
 247
 248         PUBWEAK TIM16_IRQHandler
 249         SECTION .text:CODE:NOROOT:REORDER(1)
 250 TIM16_IRQHandler
 251         B TIM16_IRQHandler
 252
 253         PUBWEAK TIM17_IRQHandler
 254         SECTION .text:CODE:NOROOT:REORDER(1)
 255 TIM17_IRQHandler
 256         B TIM17_IRQHandler
 257
 258         PUBWEAK I2C1_IRQHandler
 259         SECTION .text:CODE:NOROOT:REORDER(1)
 260 I2C1_IRQHandler
 261         B I2C1_IRQHandler
 262
 263         PUBWEAK I2C2_IRQHandler
 264         SECTION .text:CODE:NOROOT:REORDER(1)
 265 I2C2_IRQHandler
 266         B I2C2_IRQHandler
 267
 268         PUBWEAK SPI1_IRQHandler
 269         SECTION .text:CODE:NOROOT:REORDER(1)
 270 SPI1_IRQHandler
 271         B SPI1_IRQHandler
 272
 273         PUBWEAK SPI2_IRQHandler
 274         SECTION .text:CODE:NOROOT:REORDER(1)
 275 SPI2_IRQHandler
 276         B SPI2_IRQHandler
 277
 278         PUBWEAK USART1_IRQHandler
 279         SECTION .text:CODE:NOROOT:REORDER(1)
 280 USART1_IRQHandler
 281         B USART1_IRQHandler
 282
 283         PUBWEAK USART2_IRQHandler
 284         SECTION .text:CODE:NOROOT:REORDER(1)
 285 USART2_IRQHandler
 286         B USART2_IRQHandler
 287
 288
 289
 290         END
 291 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****