tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.s

   1 ; STM32F030x8 devices vector table for MDK ARM_MICRO toolchain
   2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
   3 ; Copyright (c) 2014, STMicroelectronics
   4 ; All rights reserved.
   5 ;
   6 ; Redistribution and use in source and binary forms, with or without
   7 ; modification, are permitted provided that the following conditions are met:
   8 ;
   9 ; 1. Redistributions of source code must retain the above copyright notice,
  10 ;     this list of conditions and the following disclaimer.
  11 ; 2. Redistributions in binary form must reproduce the above copyright notice,
  12 ;    this list of conditions and the following disclaimer in the documentation
  13 ;    and/or other materials provided with the distribution.
  14 ; 3. Neither the name of STMicroelectronics nor the names of its contributors
  15 ;    may be used to endorse or promote products derived from this software
  16 ;    without specific prior written permission.
  17 ;
  18 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21 ; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  22 ; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23 ; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  24 ; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  25 ; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26 ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29
  30 ; Amount of memory (in bytes) allocated for Stack
  31 ; Tailor this value to your application needs
  32 ; <h> Stack Configuration
  33 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  34 ; </h>
  35
  36 Stack_Size      EQU     0x00000400
  37
  38                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  39                 EXPORT  __initial_sp
  40
  41 Stack_Mem       SPACE   Stack_Size
  42 __initial_sp    EQU     0x20002000 ; Top of RAM (8 KB for STM32F030R8)
  43
  44
  45 ; <h> Heap Configuration
  46 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  47 ; </h>
  48
  49 Heap_Size       EQU     0x00000400
  50
  51                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  52                 EXPORT  __heap_base
  53                 EXPORT  __heap_limit
  54
  55 __heap_base
  56 Heap_Mem        SPACE   Heap_Size
  57 __heap_limit    EQU (__initial_sp - Stack_Size)
  58
  59                 PRESERVE8
  60                 THUMB
  61
  62
  63 ; Vector Table Mapped to Address 0 at Reset
  64                 AREA    RESET, DATA, READONLY
  65                 EXPORT  __Vectors
  66                 EXPORT  __Vectors_End
  67                 EXPORT  __Vectors_Size
  68
  69 __Vectors       DCD     __initial_sp                   ; Top of Stack
  70                 DCD     Reset_Handler                  ; Reset Handler
  71                 DCD     NMI_Handler                    ; NMI Handler
  72                 DCD     HardFault_Handler              ; Hard Fault Handler
  73                 DCD     0                              ; Reserved
  74                 DCD     0                              ; Reserved
  75                 DCD     0                              ; Reserved
  76                 DCD     0                              ; Reserved
  77                 DCD     0                              ; Reserved
  78                 DCD     0                              ; Reserved
  79                 DCD     0                              ; Reserved
  80                 DCD     SVC_Handler                    ; SVCall Handler
  81                 DCD     0                              ; Reserved
  82                 DCD     0                              ; Reserved
  83                 DCD     PendSV_Handler                 ; PendSV Handler
  84                 DCD     SysTick_Handler                ; SysTick Handler
  85
  86                 ; External Interrupts
  87                 DCD     WWDG_IRQHandler                ; Window Watchdog
  88                 DCD     0                              ; Reserved
  89                 DCD     RTC_IRQHandler                 ; RTC through EXTI Line
  90                 DCD     FLASH_IRQHandler               ; FLASH
  91                 DCD     RCC_IRQHandler                 ; RCC
  92                 DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
  93                 DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
  94                 DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
  95                 DCD     0                              ; Reserved
  96                 DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
  97                 DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
  98                 DCD     DMA1_Channel4_5_IRQHandler     ; DMA1 Channel 4 and Channel 5
  99                 DCD     ADC1_IRQHandler                ; ADC1
 100                 DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
 101                 DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
 102                 DCD     0                              ; Reserved
 103                 DCD     TIM3_IRQHandler                ; TIM3
 104                 DCD     0                              ; Reserved
 105                 DCD     0                              ; Reserved
 106                 DCD     TIM14_IRQHandler               ; TIM14
 107                 DCD     TIM15_IRQHandler               ; TIM15
 108                 DCD     TIM16_IRQHandler               ; TIM16
 109                 DCD     TIM17_IRQHandler               ; TIM17
 110                 DCD     I2C1_IRQHandler                ; I2C1
 111                 DCD     I2C2_IRQHandler                ; I2C2
 112                 DCD     SPI1_IRQHandler                ; SPI1
 113                 DCD     SPI2_IRQHandler                ; SPI2
 114                 DCD     USART1_IRQHandler              ; USART1
 115                 DCD     USART2_IRQHandler              ; USART2
 116
 117 __Vectors_End
 118
 119 __Vectors_Size  EQU  __Vectors_End - __Vectors
 120
 121                 AREA    |.text|, CODE, READONLY
 122
 123 ; Reset handler
 124 Reset_Handler    PROC
 125                  EXPORT  Reset_Handler                 [WEAK]
 126         IMPORT  __main
 127         IMPORT  SystemInit
 128                  LDR     R0, =SystemInit
 129                  BLX     R0
 130                  LDR     R0, =__main
 131                  BX      R0
 132                  ENDP
 133
 134 ; Dummy Exception Handlers (infinite loops which can be modified)
 135
 136 NMI_Handler     PROC
 137                 EXPORT  NMI_Handler                    [WEAK]
 138                 B       .
 139                 ENDP
 140 HardFault_Handler\
 141                 PROC
 142                 EXPORT  HardFault_Handler              [WEAK]
 143                 B       .
 144                 ENDP
 145 SVC_Handler     PROC
 146                 EXPORT  SVC_Handler                    [WEAK]
 147                 B       .
 148                 ENDP
 149 PendSV_Handler  PROC
 150                 EXPORT  PendSV_Handler                 [WEAK]
 151                 B       .
 152                 ENDP
 153 SysTick_Handler PROC
 154                 EXPORT  SysTick_Handler                [WEAK]
 155                 B       .
 156                 ENDP
 157
 158 Default_Handler PROC
 159
 160                 EXPORT  WWDG_IRQHandler                [WEAK]
 161                 EXPORT  RTC_IRQHandler                 [WEAK]
 162                 EXPORT  FLASH_IRQHandler               [WEAK]
 163                 EXPORT  RCC_IRQHandler                 [WEAK]
 164                 EXPORT  EXTI0_1_IRQHandler             [WEAK]
 165                 EXPORT  EXTI2_3_IRQHandler             [WEAK]
 166                 EXPORT  EXTI4_15_IRQHandler            [WEAK]
 167                 EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
 168                 EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
 169                 EXPORT  DMA1_Channel4_5_IRQHandler     [WEAK]
 170                 EXPORT  ADC1_IRQHandler                [WEAK]
 171                 EXPORT  TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
 172                 EXPORT  TIM1_CC_IRQHandler             [WEAK]
 173                 EXPORT  TIM3_IRQHandler                [WEAK]
 174                 EXPORT  TIM14_IRQHandler               [WEAK]
 175                 EXPORT  TIM15_IRQHandler               [WEAK]
 176                 EXPORT  TIM16_IRQHandler               [WEAK]
 177                 EXPORT  TIM17_IRQHandler               [WEAK]
 178                 EXPORT  I2C1_IRQHandler                [WEAK]
 179                 EXPORT  I2C2_IRQHandler                [WEAK]
 180                 EXPORT  SPI1_IRQHandler                [WEAK]
 181                 EXPORT  SPI2_IRQHandler                [WEAK]
 182                 EXPORT  USART1_IRQHandler              [WEAK]
 183                 EXPORT  USART2_IRQHandler              [WEAK]
 184
 185
 186 WWDG_IRQHandler
 187 RTC_IRQHandler
 188 FLASH_IRQHandler
 189 RCC_IRQHandler
 190 EXTI0_1_IRQHandler
 191 EXTI2_3_IRQHandler
 192 EXTI4_15_IRQHandler
 193 DMA1_Channel1_IRQHandler
 194 DMA1_Channel2_3_IRQHandler
 195 DMA1_Channel4_5_IRQHandler
 196 ADC1_IRQHandler
 197 TIM1_BRK_UP_TRG_COM_IRQHandler
 198 TIM1_CC_IRQHandler
 199 TIM3_IRQHandler
 200 TIM14_IRQHandler
 201 TIM15_IRQHandler
 202 TIM16_IRQHandler
 203 TIM17_IRQHandler
 204 I2C1_IRQHandler
 205 I2C2_IRQHandler
 206 SPI1_IRQHandler
 207 SPI2_IRQHandler
 208 USART1_IRQHandler
 209 USART2_IRQHandler
 210
 211                 B       .
 212
 213                 ENDP
 214
 215                 ALIGN
 216                  END