1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : inb_iodefine.h
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef INB_IODEFINE_H
30 #define INB_IODEFINE_H
34 volatile uint32_t RMPR; /* RMPR */
35 #define INB_AXIBUSCTLn_COUNT 11
36 volatile uint32_t AXIBUSCTL0; /* AXIBUSCTL0 */
37 volatile uint32_t AXIBUSCTL1; /* AXIBUSCTL1 */
38 volatile uint32_t AXIBUSCTL2; /* AXIBUSCTL2 */
39 volatile uint32_t AXIBUSCTL3; /* AXIBUSCTL3 */
40 volatile uint32_t AXIBUSCTL4; /* AXIBUSCTL4 */
41 volatile uint32_t AXIBUSCTL5; /* AXIBUSCTL5 */
42 volatile uint32_t AXIBUSCTL6; /* AXIBUSCTL6 */
43 volatile uint32_t AXIBUSCTL7; /* AXIBUSCTL7 */
44 volatile uint32_t AXIBUSCTL8; /* AXIBUSCTL8 */
45 volatile uint32_t AXIBUSCTL9; /* AXIBUSCTL9 */
46 volatile uint32_t AXIBUSCTL10; /* AXIBUSCTL10 */
47 #define INB_AXIRERRCTLn_COUNT 4
48 volatile uint32_t AXIRERRCTL0; /* AXIRERRCTL0 */
49 volatile uint32_t AXIRERRCTL1; /* AXIRERRCTL1 */
50 volatile uint32_t AXIRERRCTL2; /* AXIRERRCTL2 */
51 volatile uint32_t AXIRERRCTL3; /* AXIRERRCTL3 */
52 #define INB_AXIRERRSTn_COUNT 4
53 volatile uint32_t AXIRERRST0; /* AXIRERRST0 */
54 volatile uint32_t AXIRERRST1; /* AXIRERRST1 */
55 volatile uint32_t AXIRERRST2; /* AXIRERRST2 */
56 volatile uint32_t AXIRERRST3; /* AXIRERRST3 */
57 #define INB_AXIRERRCLRn_COUNT 4
58 volatile uint32_t AXIRERRCLR0; /* AXIRERRCLR0 */
59 volatile uint32_t AXIRERRCLR1; /* AXIRERRCLR1 */
60 volatile uint32_t AXIRERRCLR2; /* AXIRERRCLR2 */
61 volatile uint32_t AXIRERRCLR3; /* AXIRERRCLR3 */
65 #define INB (*(struct st_inb *)0xFCFE1A00uL) /* INB */
68 #define INBRMPR INB.RMPR
69 #define INBAXIBUSCTL0 INB.AXIBUSCTL0
70 #define INBAXIBUSCTL1 INB.AXIBUSCTL1
71 #define INBAXIBUSCTL2 INB.AXIBUSCTL2
72 #define INBAXIBUSCTL3 INB.AXIBUSCTL3
73 #define INBAXIBUSCTL4 INB.AXIBUSCTL4
74 #define INBAXIBUSCTL5 INB.AXIBUSCTL5
75 #define INBAXIBUSCTL6 INB.AXIBUSCTL6
76 #define INBAXIBUSCTL7 INB.AXIBUSCTL7
77 #define INBAXIBUSCTL8 INB.AXIBUSCTL8
78 #define INBAXIBUSCTL9 INB.AXIBUSCTL9
79 #define INBAXIBUSCTL10 INB.AXIBUSCTL10
80 #define INBAXIRERRCTL0 INB.AXIRERRCTL0
81 #define INBAXIRERRCTL1 INB.AXIRERRCTL1
82 #define INBAXIRERRCTL2 INB.AXIRERRCTL2
83 #define INBAXIRERRCTL3 INB.AXIRERRCTL3
84 #define INBAXIRERRST0 INB.AXIRERRST0
85 #define INBAXIRERRST1 INB.AXIRERRST1
86 #define INBAXIRERRST2 INB.AXIRERRST2
87 #define INBAXIRERRST3 INB.AXIRERRST3
88 #define INBAXIRERRCLR0 INB.AXIRERRCLR0
89 #define INBAXIRERRCLR1 INB.AXIRERRCLR1
90 #define INBAXIRERRCLR2 INB.AXIRERRCLR2
91 #define INBAXIRERRCLR3 INB.AXIRERRCLR3