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[qmk_firmware.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_RENESAS / TARGET_RZ_A1H / inc / iodefines / flctl_iodefine.h
1 /*******************************************************************************
2 * DISCLAIMER
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
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8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
19 * following link:
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : flctl_iodefine.h
25 * $Rev: $
26 * $Date::                           $
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef FLCTL_IODEFINE_H
30 #define FLCTL_IODEFINE_H
31 /* ->SEC M1.10.1 : Not magic number */
32
33 struct st_flctl
34 {                                                          /* FLCTL            */
35     volatile uint32_t  FLCMNCR;                                /*  FLCMNCR         */
36     volatile uint32_t  FLCMDCR;                                /*  FLCMDCR         */
37     volatile uint32_t  FLCMCDR;                                /*  FLCMCDR         */
38     volatile uint32_t  FLADR;                                  /*  FLADR           */
39     volatile uint32_t  FLDATAR;                                /*  FLDATAR         */
40     volatile uint32_t  FLDTCNTR;                               /*  FLDTCNTR        */
41     volatile uint32_t  FLINTDMACR;                             /*  FLINTDMACR      */
42     volatile uint32_t  FLBSYTMR;                               /*  FLBSYTMR        */
43     volatile uint32_t  FLBSYCNT;                               /*  FLBSYCNT        */
44     volatile uint8_t   dummy555[8];                            /*                  */
45     volatile uint8_t   FLTRCR;                                 /*  FLTRCR          */
46     volatile uint8_t   dummy556[15];                           /*                  */
47     volatile uint32_t  FLADR2;                                 /*  FLADR2          */
48     volatile uint8_t   dummy557[16];                           /*                  */
49     volatile uint32_t  FLDTFIFO;                               /*  FLDTFIFO        */
50     volatile uint8_t   dummy558[12];                           /*                  */
51     volatile uint32_t  FLECFIFO;                               /*  FLECFIFO        */
52 };
53
54
55 #define FLCTL   (*(struct st_flctl   *)0xFCFF4000uL) /* FLCTL */
56
57
58 #define FLCTLFLCMNCR FLCTL.FLCMNCR
59 #define FLCTLFLCMDCR FLCTL.FLCMDCR
60 #define FLCTLFLCMCDR FLCTL.FLCMCDR
61 #define FLCTLFLADR FLCTL.FLADR
62 #define FLCTLFLDATAR FLCTL.FLDATAR
63 #define FLCTLFLDTCNTR FLCTL.FLDTCNTR
64 #define FLCTLFLINTDMACR FLCTL.FLINTDMACR
65 #define FLCTLFLBSYTMR FLCTL.FLBSYTMR
66 #define FLCTLFLBSYCNT FLCTL.FLBSYCNT
67 #define FLCTLFLTRCR FLCTL.FLTRCR
68 #define FLCTLFLADR2 FLCTL.FLADR2
69 #define FLCTLFLDTFIFO FLCTL.FLDTFIFO
70 #define FLCTLFLECFIFO FLCTL.FLECFIFO
71 /* <-SEC M1.10.1 */
72 #endif