]> git.donarmstrong.com Git - qmk_firmware.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/dvdec_iodefine.h
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[qmk_firmware.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_RENESAS / TARGET_RZ_A1H / inc / iodefines / dvdec_iodefine.h
1 /*******************************************************************************
2 * DISCLAIMER
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
19 * following link:
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : dvdec_iodefine.h
25 * $Rev: $
26 * $Date::                           $
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef DVDEC_IODEFINE_H
30 #define DVDEC_IODEFINE_H
31 /* ->SEC M1.10.1 : Not magic number */
32
33 struct st_dvdec
34 {                                                          /* DVDEC            */
35     volatile uint16_t ADCCR1;                                 /*  ADCCR1          */
36     volatile uint8_t   dummy1[4];                              /*                  */
37 #define DVDEC_TGCRn_COUNT 3
38     volatile uint16_t TGCR1;                                  /*  TGCR1           */
39     volatile uint16_t TGCR2;                                  /*  TGCR2           */
40     volatile uint16_t TGCR3;                                  /*  TGCR3           */
41     volatile uint8_t   dummy2[6];                              /*                  */
42 #define DVDEC_SYNSCRn_COUNT 5
43     volatile uint16_t SYNSCR1;                                /*  SYNSCR1         */
44     volatile uint16_t SYNSCR2;                                /*  SYNSCR2         */
45     volatile uint16_t SYNSCR3;                                /*  SYNSCR3         */
46     volatile uint16_t SYNSCR4;                                /*  SYNSCR4         */
47     volatile uint16_t SYNSCR5;                                /*  SYNSCR5         */
48 #define DVDEC_HAFCCRn_COUNT 3
49     volatile uint16_t HAFCCR1;                                /*  HAFCCR1         */
50     volatile uint16_t HAFCCR2;                                /*  HAFCCR2         */
51     volatile uint16_t HAFCCR3;                                /*  HAFCCR3         */
52     volatile uint16_t VCDWCR1;                                /*  VCDWCR1         */
53     volatile uint8_t   dummy3[4];                              /*                  */
54 #define DVDEC_DCPCRn_COUNT 8
55     volatile uint16_t DCPCR1;                                 /*  DCPCR1          */
56     volatile uint16_t DCPCR2;                                 /*  DCPCR2          */
57     volatile uint16_t DCPCR3;                                 /*  DCPCR3          */
58     volatile uint16_t DCPCR4;                                 /*  DCPCR4          */
59     volatile uint16_t DCPCR5;                                 /*  DCPCR5          */
60     volatile uint16_t DCPCR6;                                 /*  DCPCR6          */
61     volatile uint16_t DCPCR7;                                 /*  DCPCR7          */
62     volatile uint16_t DCPCR8;                                 /*  DCPCR8          */
63     volatile uint16_t NSDCR;                                  /*  NSDCR           */
64     volatile uint16_t BTLCR;                                  /*  BTLCR           */
65     volatile uint16_t BTGPCR;                                 /*  BTGPCR          */
66 #define DVDEC_ACCCRn_COUNT 3
67     volatile uint16_t ACCCR1;                                 /*  ACCCR1          */
68     volatile uint16_t ACCCR2;                                 /*  ACCCR2          */
69     volatile uint16_t ACCCR3;                                 /*  ACCCR3          */
70     volatile uint16_t TINTCR;                                 /*  TINTCR          */
71     volatile uint16_t YCDCR;                                  /*  YCDCR           */
72 #define DVDEC_AGCCRn_COUNT 2
73     volatile uint16_t AGCCR1;                                 /*  AGCCR1          */
74     volatile uint16_t AGCCR2;                                 /*  AGCCR2          */
75     volatile uint16_t PKLIMITCR;                              /*  PKLIMITCR       */
76 #define DVDEC_RGORCRn_COUNT 7
77     volatile uint16_t RGORCR1;                                /*  RGORCR1         */
78     volatile uint16_t RGORCR2;                                /*  RGORCR2         */
79     volatile uint16_t RGORCR3;                                /*  RGORCR3         */
80     volatile uint16_t RGORCR4;                                /*  RGORCR4         */
81     volatile uint16_t RGORCR5;                                /*  RGORCR5         */
82     volatile uint16_t RGORCR6;                                /*  RGORCR6         */
83     volatile uint16_t RGORCR7;                                /*  RGORCR7         */
84     volatile uint8_t   dummy4[24];                             /*                  */
85     volatile uint16_t AFCPFCR;                                /*  AFCPFCR         */
86     volatile uint16_t RUPDCR;                                 /*  RUPDCR          */
87     volatile uint16_t VSYNCSR;                                /*  VSYNCSR         */
88     volatile uint16_t HSYNCSR;                                /*  HSYNCSR         */
89 #define DVDEC_DCPSRn_COUNT 2
90     volatile uint16_t DCPSR1;                                 /*  DCPSR1          */
91     volatile uint16_t DCPSR2;                                 /*  DCPSR2          */
92     volatile uint8_t   dummy5[4];                              /*                  */
93     volatile uint16_t NSDSR;                                  /*  NSDSR           */
94 #define DVDEC_CROMASRn_COUNT 2
95     volatile uint16_t CROMASR1;                               /*  CROMASR1        */
96     volatile uint16_t CROMASR2;                               /*  CROMASR2        */
97     volatile uint16_t SYNCSSR;                                /*  SYNCSSR         */
98 #define DVDEC_AGCCSRn_COUNT 2
99     volatile uint16_t AGCCSR1;                                /*  AGCCSR1         */
100     volatile uint16_t AGCCSR2;                                /*  AGCCSR2         */
101     volatile uint8_t   dummy6[108];                            /*                  */
102 #define DVDEC_YCSCRn_COUNT 7
103     volatile uint16_t YCSCR3;                                 /*  YCSCR3          */
104     volatile uint16_t YCSCR4;                                 /*  YCSCR4          */
105     volatile uint16_t YCSCR5;                                 /*  YCSCR5          */
106     volatile uint16_t YCSCR6;                                 /*  YCSCR6          */
107     volatile uint16_t YCSCR7;                                 /*  YCSCR7          */
108     volatile uint16_t YCSCR8;                                 /*  YCSCR8          */
109     volatile uint16_t YCSCR9;                                 /*  YCSCR9          */
110     volatile uint8_t   dummy7[2];                              /*                  */
111     volatile uint16_t YCSCR11;                                /*  YCSCR11         */
112     volatile uint16_t YCSCR12;                                /*  YCSCR12         */
113     volatile uint8_t   dummy8[104];                            /*                  */
114     volatile uint16_t DCPCR9;                                 /*  DCPCR9          */
115     volatile uint8_t   dummy9[16];                             /*                  */
116 #define DVDEC_YCTWA_Fn_COUNT 9
117     volatile uint16_t YCTWA_F0;                               /*  YCTWA_F0        */
118     volatile uint16_t YCTWA_F1;                               /*  YCTWA_F1        */
119     volatile uint16_t YCTWA_F2;                               /*  YCTWA_F2        */
120     volatile uint16_t YCTWA_F3;                               /*  YCTWA_F3        */
121     volatile uint16_t YCTWA_F4;                               /*  YCTWA_F4        */
122     volatile uint16_t YCTWA_F5;                               /*  YCTWA_F5        */
123     volatile uint16_t YCTWA_F6;                               /*  YCTWA_F6        */
124     volatile uint16_t YCTWA_F7;                               /*  YCTWA_F7        */
125     volatile uint16_t YCTWA_F8;                               /*  YCTWA_F8        */
126 #define DVDEC_YCTWB_Fn_COUNT 9
127     volatile uint16_t YCTWB_F0;                               /*  YCTWB_F0        */
128     volatile uint16_t YCTWB_F1;                               /*  YCTWB_F1        */
129     volatile uint16_t YCTWB_F2;                               /*  YCTWB_F2        */
130     volatile uint16_t YCTWB_F3;                               /*  YCTWB_F3        */
131     volatile uint16_t YCTWB_F4;                               /*  YCTWB_F4        */
132     volatile uint16_t YCTWB_F5;                               /*  YCTWB_F5        */
133     volatile uint16_t YCTWB_F6;                               /*  YCTWB_F6        */
134     volatile uint16_t YCTWB_F7;                               /*  YCTWB_F7        */
135     volatile uint16_t YCTWB_F8;                               /*  YCTWB_F8        */
136 #define DVDEC_YCTNA_Fn_COUNT 9
137     volatile uint16_t YCTNA_F0;                               /*  YCTNA_F0        */
138     volatile uint16_t YCTNA_F1;                               /*  YCTNA_F1        */
139     volatile uint16_t YCTNA_F2;                               /*  YCTNA_F2        */
140     volatile uint16_t YCTNA_F3;                               /*  YCTNA_F3        */
141     volatile uint16_t YCTNA_F4;                               /*  YCTNA_F4        */
142     volatile uint16_t YCTNA_F5;                               /*  YCTNA_F5        */
143     volatile uint16_t YCTNA_F6;                               /*  YCTNA_F6        */
144     volatile uint16_t YCTNA_F7;                               /*  YCTNA_F7        */
145     volatile uint16_t YCTNA_F8;                               /*  YCTNA_F8        */
146 #define DVDEC_YCTNB_Fn_COUNT 9
147     volatile uint16_t YCTNB_F0;                               /*  YCTNB_F0        */
148     volatile uint16_t YCTNB_F1;                               /*  YCTNB_F1        */
149     volatile uint16_t YCTNB_F2;                               /*  YCTNB_F2        */
150     volatile uint16_t YCTNB_F3;                               /*  YCTNB_F3        */
151     volatile uint16_t YCTNB_F4;                               /*  YCTNB_F4        */
152     volatile uint16_t YCTNB_F5;                               /*  YCTNB_F5        */
153     volatile uint16_t YCTNB_F6;                               /*  YCTNB_F6        */
154     volatile uint16_t YCTNB_F7;                               /*  YCTNB_F7        */
155     volatile uint16_t YCTNB_F8;                               /*  YCTNB_F8        */
156     volatile uint8_t   dummy10[38];                            /*                  */
157     volatile uint16_t YGAINCR;                                /*  YGAINCR         */
158     volatile uint16_t CBGAINCR;                               /*  CBGAINCR        */
159     volatile uint16_t CRGAINCR;                               /*  CRGAINCR        */
160     volatile uint8_t   dummy11[122];                           /*                  */
161     volatile uint16_t PGA_UPDATE;                             /*  PGA_UPDATE      */
162     volatile uint16_t PGACR;                                  /*  PGACR           */
163     volatile uint16_t ADCCR2;                                 /*  ADCCR2          */
164 };
165
166
167 #define DVDEC1  (*(struct st_dvdec   *)0xFCFFA008uL) /* DVDEC1 */
168 #define DVDEC0  (*(struct st_dvdec   *)0xFCFFB808uL) /* DVDEC0 */
169
170
171 /* Start of channnel array defines of DVDEC */
172
173 /* Channnel array defines of DVDEC */
174 /*(Sample) value = DVDEC[ channel ]->ADCCR1; */
175 #define DVDEC_COUNT  2
176 #define DVDEC_ADDRESS_LIST \
177 {   /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
178     &DVDEC0, &DVDEC1 \
179 }   /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
180
181 /* End of channnel array defines of DVDEC */
182
183
184 #define ADCCR1_1 DVDEC1.ADCCR1
185 #define TGCR1_1 DVDEC1.TGCR1
186 #define TGCR2_1 DVDEC1.TGCR2
187 #define TGCR3_1 DVDEC1.TGCR3
188 #define SYNSCR1_1 DVDEC1.SYNSCR1
189 #define SYNSCR2_1 DVDEC1.SYNSCR2
190 #define SYNSCR3_1 DVDEC1.SYNSCR3
191 #define SYNSCR4_1 DVDEC1.SYNSCR4
192 #define SYNSCR5_1 DVDEC1.SYNSCR5
193 #define HAFCCR1_1 DVDEC1.HAFCCR1
194 #define HAFCCR2_1 DVDEC1.HAFCCR2
195 #define HAFCCR3_1 DVDEC1.HAFCCR3
196 #define VCDWCR1_1 DVDEC1.VCDWCR1
197 #define DCPCR1_1 DVDEC1.DCPCR1
198 #define DCPCR2_1 DVDEC1.DCPCR2
199 #define DCPCR3_1 DVDEC1.DCPCR3
200 #define DCPCR4_1 DVDEC1.DCPCR4
201 #define DCPCR5_1 DVDEC1.DCPCR5
202 #define DCPCR6_1 DVDEC1.DCPCR6
203 #define DCPCR7_1 DVDEC1.DCPCR7
204 #define DCPCR8_1 DVDEC1.DCPCR8
205 #define NSDCR_1 DVDEC1.NSDCR
206 #define BTLCR_1 DVDEC1.BTLCR
207 #define BTGPCR_1 DVDEC1.BTGPCR
208 #define ACCCR1_1 DVDEC1.ACCCR1
209 #define ACCCR2_1 DVDEC1.ACCCR2
210 #define ACCCR3_1 DVDEC1.ACCCR3
211 #define TINTCR_1 DVDEC1.TINTCR
212 #define YCDCR_1 DVDEC1.YCDCR
213 #define AGCCR1_1 DVDEC1.AGCCR1
214 #define AGCCR2_1 DVDEC1.AGCCR2
215 #define PKLIMITCR_1 DVDEC1.PKLIMITCR
216 #define RGORCR1_1 DVDEC1.RGORCR1
217 #define RGORCR2_1 DVDEC1.RGORCR2
218 #define RGORCR3_1 DVDEC1.RGORCR3
219 #define RGORCR4_1 DVDEC1.RGORCR4
220 #define RGORCR5_1 DVDEC1.RGORCR5
221 #define RGORCR6_1 DVDEC1.RGORCR6
222 #define RGORCR7_1 DVDEC1.RGORCR7
223 #define AFCPFCR_1 DVDEC1.AFCPFCR
224 #define RUPDCR_1 DVDEC1.RUPDCR
225 #define VSYNCSR_1 DVDEC1.VSYNCSR
226 #define HSYNCSR_1 DVDEC1.HSYNCSR
227 #define DCPSR1_1 DVDEC1.DCPSR1
228 #define DCPSR2_1 DVDEC1.DCPSR2
229 #define NSDSR_1 DVDEC1.NSDSR
230 #define CROMASR1_1 DVDEC1.CROMASR1
231 #define CROMASR2_1 DVDEC1.CROMASR2
232 #define SYNCSSR_1 DVDEC1.SYNCSSR
233 #define AGCCSR1_1 DVDEC1.AGCCSR1
234 #define AGCCSR2_1 DVDEC1.AGCCSR2
235 #define YCSCR3_1 DVDEC1.YCSCR3
236 #define YCSCR4_1 DVDEC1.YCSCR4
237 #define YCSCR5_1 DVDEC1.YCSCR5
238 #define YCSCR6_1 DVDEC1.YCSCR6
239 #define YCSCR7_1 DVDEC1.YCSCR7
240 #define YCSCR8_1 DVDEC1.YCSCR8
241 #define YCSCR9_1 DVDEC1.YCSCR9
242 #define YCSCR11_1 DVDEC1.YCSCR11
243 #define YCSCR12_1 DVDEC1.YCSCR12
244 #define DCPCR9_1 DVDEC1.DCPCR9
245 #define YCTWA_F0_1 DVDEC1.YCTWA_F0
246 #define YCTWA_F1_1 DVDEC1.YCTWA_F1
247 #define YCTWA_F2_1 DVDEC1.YCTWA_F2
248 #define YCTWA_F3_1 DVDEC1.YCTWA_F3
249 #define YCTWA_F4_1 DVDEC1.YCTWA_F4
250 #define YCTWA_F5_1 DVDEC1.YCTWA_F5
251 #define YCTWA_F6_1 DVDEC1.YCTWA_F6
252 #define YCTWA_F7_1 DVDEC1.YCTWA_F7
253 #define YCTWA_F8_1 DVDEC1.YCTWA_F8
254 #define YCTWB_F0_1 DVDEC1.YCTWB_F0
255 #define YCTWB_F1_1 DVDEC1.YCTWB_F1
256 #define YCTWB_F2_1 DVDEC1.YCTWB_F2
257 #define YCTWB_F3_1 DVDEC1.YCTWB_F3
258 #define YCTWB_F4_1 DVDEC1.YCTWB_F4
259 #define YCTWB_F5_1 DVDEC1.YCTWB_F5
260 #define YCTWB_F6_1 DVDEC1.YCTWB_F6
261 #define YCTWB_F7_1 DVDEC1.YCTWB_F7
262 #define YCTWB_F8_1 DVDEC1.YCTWB_F8
263 #define YCTNA_F0_1 DVDEC1.YCTNA_F0
264 #define YCTNA_F1_1 DVDEC1.YCTNA_F1
265 #define YCTNA_F2_1 DVDEC1.YCTNA_F2
266 #define YCTNA_F3_1 DVDEC1.YCTNA_F3
267 #define YCTNA_F4_1 DVDEC1.YCTNA_F4
268 #define YCTNA_F5_1 DVDEC1.YCTNA_F5
269 #define YCTNA_F6_1 DVDEC1.YCTNA_F6
270 #define YCTNA_F7_1 DVDEC1.YCTNA_F7
271 #define YCTNA_F8_1 DVDEC1.YCTNA_F8
272 #define YCTNB_F0_1 DVDEC1.YCTNB_F0
273 #define YCTNB_F1_1 DVDEC1.YCTNB_F1
274 #define YCTNB_F2_1 DVDEC1.YCTNB_F2
275 #define YCTNB_F3_1 DVDEC1.YCTNB_F3
276 #define YCTNB_F4_1 DVDEC1.YCTNB_F4
277 #define YCTNB_F5_1 DVDEC1.YCTNB_F5
278 #define YCTNB_F6_1 DVDEC1.YCTNB_F6
279 #define YCTNB_F7_1 DVDEC1.YCTNB_F7
280 #define YCTNB_F8_1 DVDEC1.YCTNB_F8
281 #define YGAINCR_1 DVDEC1.YGAINCR
282 #define CBGAINCR_1 DVDEC1.CBGAINCR
283 #define CRGAINCR_1 DVDEC1.CRGAINCR
284 #define PGA_UPDATE_1 DVDEC1.PGA_UPDATE
285 #define PGACR_1 DVDEC1.PGACR
286 #define ADCCR2_1 DVDEC1.ADCCR2
287 #define ADCCR1_0 DVDEC0.ADCCR1
288 #define TGCR1_0 DVDEC0.TGCR1
289 #define TGCR2_0 DVDEC0.TGCR2
290 #define TGCR3_0 DVDEC0.TGCR3
291 #define SYNSCR1_0 DVDEC0.SYNSCR1
292 #define SYNSCR2_0 DVDEC0.SYNSCR2
293 #define SYNSCR3_0 DVDEC0.SYNSCR3
294 #define SYNSCR4_0 DVDEC0.SYNSCR4
295 #define SYNSCR5_0 DVDEC0.SYNSCR5
296 #define HAFCCR1_0 DVDEC0.HAFCCR1
297 #define HAFCCR2_0 DVDEC0.HAFCCR2
298 #define HAFCCR3_0 DVDEC0.HAFCCR3
299 #define VCDWCR1_0 DVDEC0.VCDWCR1
300 #define DCPCR1_0 DVDEC0.DCPCR1
301 #define DCPCR2_0 DVDEC0.DCPCR2
302 #define DCPCR3_0 DVDEC0.DCPCR3
303 #define DCPCR4_0 DVDEC0.DCPCR4
304 #define DCPCR5_0 DVDEC0.DCPCR5
305 #define DCPCR6_0 DVDEC0.DCPCR6
306 #define DCPCR7_0 DVDEC0.DCPCR7
307 #define DCPCR8_0 DVDEC0.DCPCR8
308 #define NSDCR_0 DVDEC0.NSDCR
309 #define BTLCR_0 DVDEC0.BTLCR
310 #define BTGPCR_0 DVDEC0.BTGPCR
311 #define ACCCR1_0 DVDEC0.ACCCR1
312 #define ACCCR2_0 DVDEC0.ACCCR2
313 #define ACCCR3_0 DVDEC0.ACCCR3
314 #define TINTCR_0 DVDEC0.TINTCR
315 #define YCDCR_0 DVDEC0.YCDCR
316 #define AGCCR1_0 DVDEC0.AGCCR1
317 #define AGCCR2_0 DVDEC0.AGCCR2
318 #define PKLIMITCR_0 DVDEC0.PKLIMITCR
319 #define RGORCR1_0 DVDEC0.RGORCR1
320 #define RGORCR2_0 DVDEC0.RGORCR2
321 #define RGORCR3_0 DVDEC0.RGORCR3
322 #define RGORCR4_0 DVDEC0.RGORCR4
323 #define RGORCR5_0 DVDEC0.RGORCR5
324 #define RGORCR6_0 DVDEC0.RGORCR6
325 #define RGORCR7_0 DVDEC0.RGORCR7
326 #define AFCPFCR_0 DVDEC0.AFCPFCR
327 #define RUPDCR_0 DVDEC0.RUPDCR
328 #define VSYNCSR_0 DVDEC0.VSYNCSR
329 #define HSYNCSR_0 DVDEC0.HSYNCSR
330 #define DCPSR1_0 DVDEC0.DCPSR1
331 #define DCPSR2_0 DVDEC0.DCPSR2
332 #define NSDSR_0 DVDEC0.NSDSR
333 #define CROMASR1_0 DVDEC0.CROMASR1
334 #define CROMASR2_0 DVDEC0.CROMASR2
335 #define SYNCSSR_0 DVDEC0.SYNCSSR
336 #define AGCCSR1_0 DVDEC0.AGCCSR1
337 #define AGCCSR2_0 DVDEC0.AGCCSR2
338 #define YCSCR3_0 DVDEC0.YCSCR3
339 #define YCSCR4_0 DVDEC0.YCSCR4
340 #define YCSCR5_0 DVDEC0.YCSCR5
341 #define YCSCR6_0 DVDEC0.YCSCR6
342 #define YCSCR7_0 DVDEC0.YCSCR7
343 #define YCSCR8_0 DVDEC0.YCSCR8
344 #define YCSCR9_0 DVDEC0.YCSCR9
345 #define YCSCR11_0 DVDEC0.YCSCR11
346 #define YCSCR12_0 DVDEC0.YCSCR12
347 #define DCPCR9_0 DVDEC0.DCPCR9
348 #define YCTWA_F0_0 DVDEC0.YCTWA_F0
349 #define YCTWA_F1_0 DVDEC0.YCTWA_F1
350 #define YCTWA_F2_0 DVDEC0.YCTWA_F2
351 #define YCTWA_F3_0 DVDEC0.YCTWA_F3
352 #define YCTWA_F4_0 DVDEC0.YCTWA_F4
353 #define YCTWA_F5_0 DVDEC0.YCTWA_F5
354 #define YCTWA_F6_0 DVDEC0.YCTWA_F6
355 #define YCTWA_F7_0 DVDEC0.YCTWA_F7
356 #define YCTWA_F8_0 DVDEC0.YCTWA_F8
357 #define YCTWB_F0_0 DVDEC0.YCTWB_F0
358 #define YCTWB_F1_0 DVDEC0.YCTWB_F1
359 #define YCTWB_F2_0 DVDEC0.YCTWB_F2
360 #define YCTWB_F3_0 DVDEC0.YCTWB_F3
361 #define YCTWB_F4_0 DVDEC0.YCTWB_F4
362 #define YCTWB_F5_0 DVDEC0.YCTWB_F5
363 #define YCTWB_F6_0 DVDEC0.YCTWB_F6
364 #define YCTWB_F7_0 DVDEC0.YCTWB_F7
365 #define YCTWB_F8_0 DVDEC0.YCTWB_F8
366 #define YCTNA_F0_0 DVDEC0.YCTNA_F0
367 #define YCTNA_F1_0 DVDEC0.YCTNA_F1
368 #define YCTNA_F2_0 DVDEC0.YCTNA_F2
369 #define YCTNA_F3_0 DVDEC0.YCTNA_F3
370 #define YCTNA_F4_0 DVDEC0.YCTNA_F4
371 #define YCTNA_F5_0 DVDEC0.YCTNA_F5
372 #define YCTNA_F6_0 DVDEC0.YCTNA_F6
373 #define YCTNA_F7_0 DVDEC0.YCTNA_F7
374 #define YCTNA_F8_0 DVDEC0.YCTNA_F8
375 #define YCTNB_F0_0 DVDEC0.YCTNB_F0
376 #define YCTNB_F1_0 DVDEC0.YCTNB_F1
377 #define YCTNB_F2_0 DVDEC0.YCTNB_F2
378 #define YCTNB_F3_0 DVDEC0.YCTNB_F3
379 #define YCTNB_F4_0 DVDEC0.YCTNB_F4
380 #define YCTNB_F5_0 DVDEC0.YCTNB_F5
381 #define YCTNB_F6_0 DVDEC0.YCTNB_F6
382 #define YCTNB_F7_0 DVDEC0.YCTNB_F7
383 #define YCTNB_F8_0 DVDEC0.YCTNB_F8
384 #define YGAINCR_0 DVDEC0.YGAINCR
385 #define CBGAINCR_0 DVDEC0.CBGAINCR
386 #define CRGAINCR_0 DVDEC0.CRGAINCR
387 #define PGA_UPDATE_0 DVDEC0.PGA_UPDATE
388 #define PGACR_0 DVDEC0.PGACR
389 #define ADCCR2_0 DVDEC0.ADCCR2
390 /* <-SEC M1.10.1 */
391 #endif