tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/ceu_iodefine.h

   1 /*******************************************************************************
   2 * DISCLAIMER
   3 * This software is supplied by Renesas Electronics Corporation and is only
   4 * intended for use with Renesas products. No other uses are authorized. This
   5 * software is owned by Renesas Electronics Corporation and is protected under
   6 * all applicable laws, including copyright laws.
   7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
   8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
   9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
  10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
  11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
  12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
  13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
  14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
  15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
  16 * Renesas reserves the right, without notice, to make changes to this software
  17 * and to discontinue the availability of this software. By using this software,
  18 * you agree to the additional terms and conditions found by accessing the
  19 * following link:
  20 * http://www.renesas.com/disclaimer*
  21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
  22 *******************************************************************************/
  23 /*******************************************************************************
  24 * File Name : ceu_iodefine.h
  25 * $Rev: $
  26 * $Date::                           $
  27 * Description : Definition of I/O Register (V1.00a)
  28 ******************************************************************************/
  29 #ifndef CEU_IODEFINE_H
  30 #define CEU_IODEFINE_H
  31 /* ->SEC M1.10.1 : Not magic number */
  32
  33 struct st_ceu
  34 {                                                          /* CEU              */
  35 /* start of struct st_ceu_n */
  36     volatile uint32_t  CAPSR;                                  /*  CAPSR           */
  37     volatile uint32_t  CAPCR;                                  /*  CAPCR           */
  38     volatile uint32_t  CAMCR;                                  /*  CAMCR           */
  39     volatile uint32_t  CMCYR;                                  /*  CMCYR           */
  40     volatile uint32_t  CAMOR_A;                                /*  CAMOR_A         */
  41     volatile uint32_t  CAPWR_A;                                /*  CAPWR_A         */
  42     volatile uint32_t  CAIFR;                                  /*  CAIFR           */
  43     volatile uint8_t   dummy305[12];                           /*                  */
  44     volatile uint32_t  CRCNTR;                                 /*  CRCNTR          */
  45     volatile uint32_t  CRCMPR;                                 /*  CRCMPR          */
  46     volatile uint32_t  CFLCR_A;                                /*  CFLCR_A         */
  47     volatile uint32_t  CFSZR_A;                                /*  CFSZR_A         */
  48     volatile uint32_t  CDWDR_A;                                /*  CDWDR_A         */
  49     volatile uint32_t  CDAYR_A;                                /*  CDAYR_A         */
  50     volatile uint32_t  CDACR_A;                                /*  CDACR_A         */
  51     volatile uint32_t  CDBYR_A;                                /*  CDBYR_A         */
  52     volatile uint32_t  CDBCR_A;                                /*  CDBCR_A         */
  53     volatile uint32_t  CBDSR_A;                                /*  CBDSR_A         */
  54     volatile uint8_t   dummy306[12];                           /*                  */
  55     volatile uint32_t  CFWCR;                                  /*  CFWCR           */
  56     volatile uint32_t  CLFCR_A;                                /*  CLFCR_A         */
  57     volatile uint32_t  CDOCR_A;                                /*  CDOCR_A         */
  58     volatile uint8_t   dummy307[8];                            /*                  */
  59     volatile uint32_t  CEIER;                                  /*  CEIER           */
  60     volatile uint32_t  CETCR;                                  /*  CETCR           */
  61     volatile uint8_t   dummy308[4];                            /*                  */
  62     volatile uint32_t  CSTSR;                                  /*  CSTSR           */
  63     volatile uint8_t   dummy309[4];                            /*                  */
  64     volatile uint32_t  CDSSR;                                  /*  CDSSR           */
  65     volatile uint8_t   dummy310[8];                            /*                  */
  66     volatile uint32_t  CDAYR2_A;                               /*  CDAYR2_A        */
  67     volatile uint32_t  CDACR2_A;                               /*  CDACR2_A        */
  68     volatile uint32_t  CDBYR2_A;                               /*  CDBYR2_A        */
  69     volatile uint32_t  CDBCR2_A;                               /*  CDBCR2_A        */
  70 /* end of struct st_ceu_n */
  71     volatile uint8_t   dummy3110[3936];                        /*                  */
  72 /* start of struct st_ceu_n */
  73     volatile uint8_t   dummy3111[4];                           /*                  */
  74     volatile uint8_t   dummy3112[4];                           /*                  */
  75     volatile uint8_t   dummy3113[4];                           /*                  */
  76     volatile uint8_t   dummy3114[4];                           /*                  */
  77     volatile uint32_t  CAMOR_B;                                /*  CAMOR_B         */
  78     volatile uint32_t  CAPWR_B;                                /*  CAPWR_B         */
  79     volatile uint8_t   dummy3120[4];                           /*                  */
  80     volatile uint8_t   dummy3121[12];                          /*                  */
  81     volatile uint8_t   dummy3122[4];                           /*                  */
  82     volatile uint8_t   dummy3123[4];                           /*                  */
  83     volatile uint32_t  CFLCR_B;                                /*  CFLCR_B         */
  84     volatile uint32_t  CFSZR_B;                                /*  CFSZR_B         */
  85     volatile uint32_t  CDWDR_B;                                /*  CDWDR_B         */
  86     volatile uint32_t  CDAYR_B;                                /*  CDAYR_B         */
  87     volatile uint32_t  CDACR_B;                                /*  CDACR_B         */
  88     volatile uint32_t  CDBYR_B;                                /*  CDBYR_B         */
  89     volatile uint32_t  CDBCR_B;                                /*  CDBCR_B         */
  90     volatile uint32_t  CBDSR_B;                                /*  CBDSR_B         */
  91     volatile uint8_t   dummy3130[12];                          /*                  */
  92     volatile uint8_t   dummy3131[4];                           /*                  */
  93     volatile uint32_t  CLFCR_B;                                /*  CLFCR_B         */
  94     volatile uint32_t  CDOCR_B;                                /*  CDOCR_B         */
  95     volatile uint8_t   dummy3140[8];                           /*                  */
  96     volatile uint8_t   dummy3141[4];                           /*                  */
  97     volatile uint8_t   dummy3142[4];                           /*                  */
  98     volatile uint8_t   dummy3143[4];                           /*                  */
  99     volatile uint8_t   dummy3144[4];                           /*                  */
 100     volatile uint8_t   dummy3145[4];                           /*                  */
 101     volatile uint8_t   dummy3146[4];                           /*                  */
 102     volatile uint8_t   dummy3147[8];                           /*                  */
 103     volatile uint32_t  CDAYR2_B;                               /*  CDAYR2_B        */
 104     volatile uint32_t  CDACR2_B;                               /*  CDACR2_B        */
 105     volatile uint32_t  CDBYR2_B;                               /*  CDBYR2_B        */
 106     volatile uint32_t  CDBCR2_B;                               /*  CDBCR2_B        */
 107 /* end of struct st_ceu_n */
 108     volatile uint8_t   dummy3150[3936];                        /*                  */
 109 /* start of struct st_ceu_n */
 110     volatile uint8_t   dummy3151[4];                           /*                  */
 111     volatile uint8_t   dummy3152[4];                           /*                  */
 112     volatile uint8_t   dummy3153[4];                           /*                  */
 113     volatile uint8_t   dummy3154[4];                           /*                  */
 114     volatile uint32_t  CAMOR_M;                                /*  CAMOR_M         */
 115     volatile uint32_t  CAPWR_M;                                /*  CAPWR_M         */
 116     volatile uint8_t   dummy3160[4];                           /*                  */
 117     volatile uint8_t   dummy3161[12];                          /*                  */
 118     volatile uint8_t   dummy3162[4];                           /*                  */
 119     volatile uint8_t   dummy3163[4];                           /*                  */
 120     volatile uint32_t  CFLCR_M;                                /*  CFLCR_M         */
 121     volatile uint32_t  CFSZR_M;                                /*  CFSZR_M         */
 122     volatile uint32_t  CDWDR_M;                                /*  CDWDR_M         */
 123     volatile uint32_t  CDAYR_M;                                /*  CDAYR_M         */
 124     volatile uint32_t  CDACR_M;                                /*  CDACR_M         */
 125     volatile uint32_t  CDBYR_M;                                /*  CDBYR_M         */
 126     volatile uint32_t  CDBCR_M;                                /*  CDBCR_M         */
 127     volatile uint32_t  CBDSR_M;                                /*  CBDSR_M         */
 128     volatile uint8_t   dummy3170[12];                          /*                  */
 129     volatile uint8_t   dummy3171[4];                           /*                  */
 130     volatile uint32_t  CLFCR_M;                                /*  CLFCR_M         */
 131     volatile uint32_t  CDOCR_M;                                /*  CDOCR_M         */
 132     volatile uint8_t   dummy3180[8];                           /*                  */
 133     volatile uint8_t   dummy3181[4];                           /*                  */
 134     volatile uint8_t   dummy3182[4];                           /*                  */
 135     volatile uint8_t   dummy3183[4];                           /*                  */
 136     volatile uint8_t   dummy3184[4];                           /*                  */
 137     volatile uint8_t   dummy3185[4];                           /*                  */
 138     volatile uint8_t   dummy3186[4];                           /*                  */
 139     volatile uint8_t   dummy3187[8];                           /*                  */
 140     volatile uint32_t  CDAYR2_M;                               /*  CDAYR2_M        */
 141     volatile uint32_t  CDACR2_M;                               /*  CDACR2_M        */
 142     volatile uint32_t  CDBYR2_M;                               /*  CDBYR2_M        */
 143     volatile uint32_t  CDBCR2_M;                               /*  CDBCR2_M        */
 144 /* end of struct st_ceu_n */
 145 };
 146
 147
 148 struct st_ceu_n
 149 {
 150     volatile uint32_t  not_common1;                            /*                  */
 151     volatile uint32_t  not_common2;                            /*                  */
 152     volatile uint32_t  not_common3;                            /*                  */
 153     volatile uint32_t  not_common4;                            /*                  */
 154     volatile uint32_t  CAMOR;                                  /*  CAMOR           */
 155     volatile uint32_t  CAPWR;                                  /*  CAPWR           */
 156     volatile uint32_t  not_common5;                            /*                  */
 157     volatile uint8_t   dummy322[12];                           /*                  */
 158     volatile uint32_t  not_common6;                            /*                  */
 159     volatile uint32_t  not_common7;                            /*                  */
 160     volatile uint32_t  CFLCR;                                  /*  CFLCR           */
 161     volatile uint32_t  CFSZR;                                  /*  CFSZR           */
 162     volatile uint32_t  CDWDR;                                  /*  CDWDR           */
 163     volatile uint32_t  CDAYR;                                  /*  CDAYR           */
 164     volatile uint32_t  CDACR;                                  /*  CDACR           */
 165     volatile uint32_t  CDBYR;                                  /*  CDBYR           */
 166     volatile uint32_t  CDBCR;                                  /*  CDBCR           */
 167     volatile uint32_t  CBDSR;                                  /*  CBDSR           */
 168     volatile uint8_t   dummy323[12];                           /*                  */
 169     volatile uint32_t  not_common8;                            /*                  */
 170     volatile uint32_t  CLFCR;                                  /*  CLFCR           */
 171     volatile uint32_t  CDOCR;                                  /*  CDOCR           */
 172     volatile uint8_t   dummy324[8];                            /*                  */
 173     volatile uint32_t  not_common9;                            /*                  */
 174     volatile uint32_t  not_common10;                           /*                  */
 175     volatile uint8_t   dummy325[4];                            /*                  */
 176     volatile uint32_t  not_common11;                           /*                  */
 177     volatile uint8_t   dummy326[4];                            /*                  */
 178     volatile uint32_t  not_common12;                           /*                  */
 179     volatile uint8_t   dummy327[8];                            /*                  */
 180     volatile uint32_t  CDAYR2;                                 /*  CDAYR2          */
 181     volatile uint32_t  CDACR2;                                 /*  CDACR2          */
 182     volatile uint32_t  CDBYR2;                                 /*  CDBYR2          */
 183     volatile uint32_t  CDBCR2;                                 /*  CDBCR2          */
 184 };
 185
 186
 187 #define CEU     (*(struct st_ceu     *)0xE8210000uL) /* CEU */
 188
 189
 190 /* Start of channnel array defines of CEU */
 191
 192 /* Channnel array defines of CEUn */
 193 /*(Sample) value = CEUn[ channel ]->CAMOR; */
 194 #define CEUn_COUNT  3
 195 #define CEUn_ADDRESS_LIST \
 196 {   /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
 197     (volatile struct st_ceu_n*)&CEU_A, \
 198     (volatile struct st_ceu_n*)&CEU_B, \
 199     (volatile struct st_ceu_n*)&CEU_M \
 200 }   /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
 201 #define CEU_A   (*(struct st_ceu_n *)&CEU.CAPSR)                 /* CEU_A */
 202 #define CEU_B   (*(struct st_ceu_n *)&CEU.dummy3111)             /* CEU_B */
 203 #define CEU_M   (*(struct st_ceu_n *)&CEU.dummy3151)             /* CEU_M */
 204
 205 /* End of channnel array defines of CEU */
 206
 207
 208 #define CEUCAPSR CEU.CAPSR
 209 #define CEUCAPCR CEU.CAPCR
 210 #define CEUCAMCR CEU.CAMCR
 211 #define CEUCMCYR CEU.CMCYR
 212 #define CEUCAMOR_A CEU.CAMOR_A
 213 #define CEUCAPWR_A CEU.CAPWR_A
 214 #define CEUCAIFR CEU.CAIFR
 215 #define CEUCRCNTR CEU.CRCNTR
 216 #define CEUCRCMPR CEU.CRCMPR
 217 #define CEUCFLCR_A CEU.CFLCR_A
 218 #define CEUCFSZR_A CEU.CFSZR_A
 219 #define CEUCDWDR_A CEU.CDWDR_A
 220 #define CEUCDAYR_A CEU.CDAYR_A
 221 #define CEUCDACR_A CEU.CDACR_A
 222 #define CEUCDBYR_A CEU.CDBYR_A
 223 #define CEUCDBCR_A CEU.CDBCR_A
 224 #define CEUCBDSR_A CEU.CBDSR_A
 225 #define CEUCFWCR CEU.CFWCR
 226 #define CEUCLFCR_A CEU.CLFCR_A
 227 #define CEUCDOCR_A CEU.CDOCR_A
 228 #define CEUCEIER CEU.CEIER
 229 #define CEUCETCR CEU.CETCR
 230 #define CEUCSTSR CEU.CSTSR
 231 #define CEUCDSSR CEU.CDSSR
 232 #define CEUCDAYR2_A CEU.CDAYR2_A
 233 #define CEUCDACR2_A CEU.CDACR2_A
 234 #define CEUCDBYR2_A CEU.CDBYR2_A
 235 #define CEUCDBCR2_A CEU.CDBCR2_A
 236 #define CEUCAMOR_B CEU.CAMOR_B
 237 #define CEUCAPWR_B CEU.CAPWR_B
 238 #define CEUCFLCR_B CEU.CFLCR_B
 239 #define CEUCFSZR_B CEU.CFSZR_B
 240 #define CEUCDWDR_B CEU.CDWDR_B
 241 #define CEUCDAYR_B CEU.CDAYR_B
 242 #define CEUCDACR_B CEU.CDACR_B
 243 #define CEUCDBYR_B CEU.CDBYR_B
 244 #define CEUCDBCR_B CEU.CDBCR_B
 245 #define CEUCBDSR_B CEU.CBDSR_B
 246 #define CEUCLFCR_B CEU.CLFCR_B
 247 #define CEUCDOCR_B CEU.CDOCR_B
 248 #define CEUCDAYR2_B CEU.CDAYR2_B
 249 #define CEUCDACR2_B CEU.CDACR2_B
 250 #define CEUCDBYR2_B CEU.CDBYR2_B
 251 #define CEUCDBCR2_B CEU.CDBCR2_B
 252 #define CEUCAMOR_M CEU.CAMOR_M
 253 #define CEUCAPWR_M CEU.CAPWR_M
 254 #define CEUCFLCR_M CEU.CFLCR_M
 255 #define CEUCFSZR_M CEU.CFSZR_M
 256 #define CEUCDWDR_M CEU.CDWDR_M
 257 #define CEUCDAYR_M CEU.CDAYR_M
 258 #define CEUCDACR_M CEU.CDACR_M
 259 #define CEUCDBYR_M CEU.CDBYR_M
 260 #define CEUCDBCR_M CEU.CDBCR_M
 261 #define CEUCBDSR_M CEU.CBDSR_M
 262 #define CEUCLFCR_M CEU.CLFCR_M
 263 #define CEUCDOCR_M CEU.CDOCR_M
 264 #define CEUCDAYR2_M CEU.CDAYR2_M
 265 #define CEUCDACR2_M CEU.CDACR2_M
 266 #define CEUCDBYR2_M CEU.CDBYR2_M
 267 #define CEUCDBCR2_M CEU.CDBCR2_M
 268 /* <-SEC M1.10.1 */
 269 #endif