tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/bsc_iodefine.h

   1 /*******************************************************************************
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  21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
  22 *******************************************************************************/
  23 /*******************************************************************************
  24 * File Name : bsc_iodefine.h
  25 * $Rev: $
  26 * $Date::                           $
  27 * Description : Definition of I/O Register (V1.00a)
  28 ******************************************************************************/
  29 #ifndef BSC_IODEFINE_H
  30 #define BSC_IODEFINE_H
  31 /* ->SEC M1.10.1 : Not magic number */
  32
  33 struct st_bsc
  34 {                                                          /* BSC              */
  35     volatile uint32_t  CMNCR;                                  /*  CMNCR           */
  36 #define BSC_CSnBCR_COUNT 6
  37     volatile uint32_t  CS0BCR;                                 /*  CS0BCR          */
  38     volatile uint32_t  CS1BCR;                                 /*  CS1BCR          */
  39     volatile uint32_t  CS2BCR;                                 /*  CS2BCR          */
  40     volatile uint32_t  CS3BCR;                                 /*  CS3BCR          */
  41     volatile uint32_t  CS4BCR;                                 /*  CS4BCR          */
  42     volatile uint32_t  CS5BCR;                                 /*  CS5BCR          */
  43     volatile uint8_t   dummy4[12];                             /*                  */
  44 #define BSC_CSnWCR_COUNT 6
  45     volatile uint32_t  CS0WCR;                                 /*  CS0WCR          */
  46     volatile uint32_t  CS1WCR;                                 /*  CS1WCR          */
  47     volatile uint32_t  CS2WCR;                                 /*  CS2WCR          */
  48     volatile uint32_t  CS3WCR;                                 /*  CS3WCR          */
  49     volatile uint32_t  CS4WCR;                                 /*  CS4WCR          */
  50     volatile uint32_t  CS5WCR;                                 /*  CS5WCR          */
  51     volatile uint8_t   dummy5[12];                             /*                  */
  52     volatile uint32_t  SDCR;                                   /*  SDCR            */
  53     volatile uint32_t  RTCSR;                                  /*  RTCSR           */
  54     volatile uint32_t  RTCNT;                                  /*  RTCNT           */
  55     volatile uint32_t  RTCOR;                                  /*  RTCOR           */
  56     volatile uint8_t   dummy6[4];                              /*                  */
  57 #define BSC_TOSCORn_COUNT 6
  58     volatile uint32_t  TOSCOR0;                                /*  TOSCOR0         */
  59     volatile uint32_t  TOSCOR1;                                /*  TOSCOR1         */
  60     volatile uint32_t  TOSCOR2;                                /*  TOSCOR2         */
  61     volatile uint32_t  TOSCOR3;                                /*  TOSCOR3         */
  62     volatile uint32_t  TOSCOR4;                                /*  TOSCOR4         */
  63     volatile uint32_t  TOSCOR5;                                /*  TOSCOR5         */
  64     volatile uint8_t   dummy7[8];                              /*                  */
  65     volatile uint32_t  TOSTR;                                  /*  TOSTR           */
  66     volatile uint32_t  TOENR;                                  /*  TOENR           */
  67 };
  68
  69
  70 #define BSC     (*(struct st_bsc     *)0x3FFFC000uL) /* BSC */
  71
  72
  73 #define BSCCMNCR BSC.CMNCR
  74 #define BSCCS0BCR BSC.CS0BCR
  75 #define BSCCS1BCR BSC.CS1BCR
  76 #define BSCCS2BCR BSC.CS2BCR
  77 #define BSCCS3BCR BSC.CS3BCR
  78 #define BSCCS4BCR BSC.CS4BCR
  79 #define BSCCS5BCR BSC.CS5BCR
  80 #define BSCCS0WCR BSC.CS0WCR
  81 #define BSCCS1WCR BSC.CS1WCR
  82 #define BSCCS2WCR BSC.CS2WCR
  83 #define BSCCS3WCR BSC.CS3WCR
  84 #define BSCCS4WCR BSC.CS4WCR
  85 #define BSCCS5WCR BSC.CS5WCR
  86 #define BSCSDCR BSC.SDCR
  87 #define BSCRTCSR BSC.RTCSR
  88 #define BSCRTCNT BSC.RTCNT
  89 #define BSCRTCOR BSC.RTCOR
  90 #define BSCTOSCOR0 BSC.TOSCOR0
  91 #define BSCTOSCOR1 BSC.TOSCOR1
  92 #define BSCTOSCOR2 BSC.TOSCOR2
  93 #define BSCTOSCOR3 BSC.TOSCOR3
  94 #define BSCTOSCOR4 BSC.TOSCOR4
  95 #define BSCTOSCOR5 BSC.TOSCOR5
  96 #define BSCTOSTR BSC.TOSTR
  97 #define BSCTOENR BSC.TOENR
  98 /* <-SEC M1.10.1 */
  99 #endif