1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer
21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : ostm_iobitmask.h
26 * $Date:: 2014-07-09 15:35:02 +0900#$
27 * Description : OSTM register define header
28 *******************************************************************************/
29 #ifndef OSTM_IOBITMASK_H
30 #define OSTM_IOBITMASK_H
33 /* ==== Mask values for IO registers ==== */
35 #define OSTM0_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
37 #define OSTM0_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
39 #define OSTM0_OSTMnTE_OSTMnTE (0x01u)
41 #define OSTM0_OSTMnTS_OSTMnTS (0x01u)
43 #define OSTM0_OSTMnTT_OSTMnTT (0x01u)
45 #define OSTM0_OSTMnCTL_MD0 (0x00000001uL)
46 #define OSTM0_OSTMnCTL_MD1 (0x00000002uL)
49 #define OSTM1_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
51 #define OSTM1_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
53 #define OSTM1_OSTMnTE_OSTMnTE (0x01u)
55 #define OSTM1_OSTMnTS_OSTMnTS (0x01u)
57 #define OSTM1_OSTMnTT_OSTMnTT (0x01u)
59 #define OSTM1_OSTMnCTL_MD0 (0x00000001uL)
60 #define OSTM1_OSTMnCTL_MD1 (0x00000002uL)
63 #define OSTMn_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
65 #define OSTMn_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
67 #define OSTMn_OSTMnTE_OSTMnTE (0x01u)
69 #define OSTMn_OSTMnTS_OSTMnTS (0x01u)
71 #define OSTMn_OSTMnTT_OSTMnTT (0x01u)
73 #define OSTMn_OSTMnCTL_MD0 (0x00000001uL)
74 #define OSTMn_OSTMnCTL_MD1 (0x00000002uL)
77 /* ==== Shift values for IO registers ==== */
79 #define OSTM0_OSTMnCMP_OSTMnCMP_SHIFT (0u)
81 #define OSTM0_OSTMnCNT_OSTMnCNT_SHIFT (0u)
83 #define OSTM0_OSTMnTE_OSTMnTE_SHIFT (0u)
85 #define OSTM0_OSTMnTS_OSTMnTS_SHIFT (0u)
87 #define OSTM0_OSTMnTT_OSTMnTT_SHIFT (0u)
89 #define OSTM0_OSTMnCTL_MD0_SHIFT (0u)
90 #define OSTM0_OSTMnCTL_MD1_SHIFT (1u)
93 #define OSTM1_OSTMnCMP_OSTMnCMP_SHIFT (0u)
95 #define OSTM1_OSTMnCNT_OSTMnCNT_SHIFT (0u)
97 #define OSTM1_OSTMnTE_OSTMnTE_SHIFT (0u)
99 #define OSTM1_OSTMnTS_OSTMnTS_SHIFT (0u)
101 #define OSTM1_OSTMnTT_OSTMnTT_SHIFT (0u)
103 #define OSTM1_OSTMnCTL_MD0_SHIFT (0u)
104 #define OSTM1_OSTMnCTL_MD1_SHIFT (1u)
106 /* ---- OSTMn ---- */
107 #define OSTMn_OSTMnCMP_OSTMnCMP_SHIFT (0u)
109 #define OSTMn_OSTMnCNT_OSTMnCNT_SHIFT (0u)
111 #define OSTMn_OSTMnTE_OSTMnTE_SHIFT (0u)
113 #define OSTMn_OSTMnTS_OSTMnTS_SHIFT (0u)
115 #define OSTMn_OSTMnTT_OSTMnTT_SHIFT (0u)
117 #define OSTMn_OSTMnCTL_MD0_SHIFT (0u)
118 #define OSTMn_OSTMnCTL_MD1_SHIFT (1u)
121 #endif /* OSTM_IOBITMASK_H */