1 /******************************************************************************
2 * @file: system_LPC8xx.h
3 * @purpose: CMSIS Cortex-M0+ Device Peripheral Access Layer Header File
4 * for the NXP LPC8xx Device Series
7 *----------------------------------------------------------------------------
9 * Copyright (C) 2012 ARM Limited. All rights reserved.
11 * ARM Limited (ARM) is supplying this software for use with Cortex-M0+
12 * processor based microcontrollers. This file can be freely distributed
13 * within development tools that are supporting such ARM based processors.
15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 ******************************************************************************/
24 #ifndef __SYSTEM_LPC8xx_H
25 #define __SYSTEM_LPC8xx_H
33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
34 extern uint32_t MainClock; /*!< Main Clock Frequency */
38 * Initialize the system
43 * @brief Setup the microcontroller system.
44 * Initialize the System and update the SystemCoreClock variable.
46 extern void SystemInit (void);
49 * Update SystemCoreClock variable
54 * @brief Updates the SystemCoreClock with current core Clock
55 * retrieved from cpu registers.
57 extern void SystemCoreClockUpdate (void);
63 #endif /* __SYSTEM_LPC8xx_H */