tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_IAR/TARGET_LPC11XX/startup_LPC11xx.s

   1 /**************************************************
   2  *
   3  * Part one of the system initialization code, contains low-level
   4  * initialization, plain thumb variant.
   5  *
   6  * Copyright 2012 IAR Systems. All rights reserved.
   7  *
   8  * $Revision: 28 $
   9  *
  10  **************************************************/
  11
  12 ;
  13 ; The modules in this file are included in the libraries, and may be replaced
  14 ; by any user-defined modules that define the PUBLIC symbol _program_start or
  15 ; a user defined start symbol.
  16 ; To override the cstartup defined in the library, simply add your modified
  17 ; version to the workbench project.
  18 ;
  19 ; The vector table is normally located at address 0.
  20 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  21 ; The name "__vector_table" has special meaning for C-SPY:
  22 ; it is where the SP start value is found, and the NVIC vector
  23 ; table register (VTOR) is initialized to this address if != 0.
  24 ;
  25 ; Cortex-M version
  26 ;
  27
  28         MODULE  ?cstartup
  29
  30         ;; Forward declaration of sections.
  31         SECTION CSTACK:DATA:NOROOT(3)
  32
  33         SECTION .intvec:CODE:NOROOT(2)
  34
  35         EXTERN  __iar_program_start
  36         EXTERN  SystemInit
  37
  38         PUBLIC  __vector_table
  39         PUBLIC  __vector_table_0x1c
  40         DATA
  41
  42
  43 __vector_table
  44                 DCD     sfe(CSTACK)               ; Top of Stack
  45                 DCD     Reset_Handler       ; Reset Handler
  46                 DCD     NMI_Handler               ; NMI Handler
  47                 DCD     HardFault_Handler         ; Hard Fault Handler
  48                 DCD     0                         ; Reserved
  49                 DCD     0                         ; Reserved
  50                 DCD     0                         ; Reserved
  51 __vector_table_0x1c
  52                 DCD     0                         ; Reserved
  53                 DCD     0                         ; Reserved
  54                 DCD     0                         ; Reserved
  55                 DCD     0                         ; Reserved
  56                 DCD     SVC_Handler               ; SVCall Handler
  57                 DCD     0                         ; Reserved
  58                 DCD     0                         ; Reserved
  59                 DCD     PendSV_Handler            ; PendSV Handler
  60                 DCD     SysTick_Handler           ; SysTick Handler
  61
  62                 ; External Interrupts
  63                 DCD     SLWU_INT0_IRQHandler      ; Start logic wake-up interrupt 0
  64                 DCD     SLWU_INT1_IRQHandler      ; Start logic wake-up interrupt 1
  65                 DCD     SLWU_INT2_IRQHandler      ; Start logic wake-up interrupt 2
  66                 DCD     SLWU_INT3_IRQHandler      ; Start logic wake-up interrupt 3
  67                 DCD     SLWU_INT4_IRQHandler      ; Start logic wake-up interrupt 4
  68                 DCD     SLWU_INT5_IRQHandler      ; Start logic wake-up interrupt 5
  69                 DCD     SLWU_INT6_IRQHandler      ; Start logic wake-up interrupt 6
  70                 DCD     SLWU_INT7_IRQHandler      ; Start logic wake-up interrupt 7
  71                 DCD     SLWU_INT8_IRQHandler      ; Start logic wake-up interrupt 8
  72                 DCD     SLWU_INT9_IRQHandler      ; Start logic wake-up interrupt 9
  73                 DCD     SLWU_INT10_IRQHandler     ; Start logic wake-up interrupt 10
  74                 DCD     SLWU_INT11_IRQHandler     ; Start logic wake-up interrupt 11
  75                 DCD     SLWU_INT12_IRQHandler     ; Start logic wake-up interrupt 12
  76                 DCD     C_CAN_IRQHandler          ; C_CAN
  77                 DCD     SSP1_IRQHandler           ; SSP1
  78                 DCD     I2C_IRQHandler            ; I2C
  79                 DCD     TIMER16_0_IRQHandler      ; 16-bit Timer0
  80                 DCD     TIMER16_1_IRQHandler      ; 16-bit Timer1
  81                 DCD     TIMER32_0_IRQHandler      ; 32-bit Timer0
  82                 DCD     TIMER32_1_IRQHandler      ; 32-bit Timer1
  83                 DCD     SSP0_IRQHandler           ; SSP0
  84                 DCD     UART_IRQHandler           ; UART
  85                 DCD     Reserved_IRQHandler       ; Reserved
  86                 DCD     Reserved_IRQHandler       ; Reserved
  87                 DCD     ADC_IRQHandler            ; A/D Converter
  88                 DCD     WDT_IRQHandler            ; Watchdog timer
  89                 DCD     BOD_IRQHandler            ; Brown Out Detect
  90                 DCD     Reserved_IRQHandler       ; Reserved
  91                 DCD     PIO_3_IRQHandler          ; GPIO interrupt status of port 3
  92                 DCD     PIO_2_IRQHandler          ; GPIO interrupt status of port 2
  93                 DCD     PIO_1_IRQHandler          ; GPIO interrupt status of port 1
  94                 DCD     PIO_0_IRQHandler          ; GPIO interrupt status of port 0
  95
  96         ;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
  97
  98                 DCD     0xFFFFFFFF                ; Datafill
  99                 DCD     0xFFFFFFFF                ; Datafill
 100                 DCD     0xFFFFFFFF                ; Datafill
 101                 DCD     0xFFFFFFFF                ; Datafill
 102                 DCD     0xFFFFFFFF                ; Datafill
 103                 DCD     0xFFFFFFFF                ; Datafill
 104                 DCD     0xFFFFFFFF                ; Datafill
 105                 DCD     0xFFFFFFFF                ; Datafill
 106                 DCD     0xFFFFFFFF                ; Datafill
 107                 DCD     0xFFFFFFFF                ; Datafill
 108
 109                 DCD     0xFFFFFFFF                ; Datafill
 110                 DCD     0xFFFFFFFF                ; Datafill
 111                 DCD     0xFFFFFFFF                ; Datafill
 112                 DCD     0xFFFFFFFF                ; Datafill
 113                 DCD     0xFFFFFFFF                ; Datafill
 114                 DCD     0xFFFFFFFF                ; Datafill
 115                 DCD     0xFFFFFFFF                ; Datafill
 116                 DCD     0xFFFFFFFF                ; Datafill
 117                 DCD     0xFFFFFFFF                ; Datafill
 118                 DCD     0xFFFFFFFF                ; Datafill
 119
 120                 DCD     0xFFFFFFFF                ; Datafill
 121                 DCD     0xFFFFFFFF                ; Datafill
 122                 DCD     0xFFFFFFFF                ; Datafill
 123                 DCD     0xFFFFFFFF                ; Datafill
 124                 DCD     0xFFFFFFFF                ; Datafill
 125                 DCD     0xFFFFFFFF                ; Datafill
 126                 DCD     0xFFFFFFFF                ; Datafill
 127                 DCD     0xFFFFFFFF                ; Datafill
 128                 DCD     0xFFFFFFFF                ; Datafill
 129                 DCD     0xFFFFFFFF                ; Datafill
 130
 131                 DCD     0xFFFFFFFF                ; Datafill
 132                 DCD     0xFFFFFFFF                ; Datafill
 133                 DCD     0xFFFFFFFF                ; Datafill
 134                 DCD     0xFFFFFFFF                ; Datafill
 135                 DCD     0xFFFFFFFF                ; Datafill
 136                 DCD     0xFFFFFFFF                ; Datafill
 137                 DCD     0xFFFFFFFF                ; Datafill
 138                 DCD     0xFFFFFFFF                ; Datafill
 139                 DCD     0xFFFFFFFF                ; Datafill
 140                 DCD     0xFFFFFFFF                ; Datafill
 141
 142                 DCD     0xFFFFFFFF                ; Datafill
 143                 DCD     0xFFFFFFFF                ; Datafill
 144                 DCD     0xFFFFFFFF                ; Datafill
 145                 DCD     0xFFFFFFFF                ; Datafill
 146                 DCD     0xFFFFFFFF                ; Datafill
 147                 DCD     0xFFFFFFFF                ; Datafill
 148                 DCD     0xFFFFFFFF                ; Datafill
 149                 DCD     0xFFFFFFFF                ; Datafill
 150                 DCD     0xFFFFFFFF                ; Datafill
 151                 DCD     0xFFFFFFFF                ; Datafill
 152
 153                 DCD     0xFFFFFFFF                ; Datafill
 154                 DCD     0xFFFFFFFF                ; Datafill
 155                 DCD     0xFFFFFFFF                ; Datafill
 156                 DCD     0xFFFFFFFF                ; Datafill
 157                 DCD     0xFFFFFFFF                ; Datafill
 158                 DCD     0xFFFFFFFF                ; Datafill
 159                 DCD     0xFFFFFFFF                ; Datafill
 160                 DCD     0xFFFFFFFF                ; Datafill
 161                 DCD     0xFFFFFFFF                ; Datafill
 162                 DCD     0xFFFFFFFF                ; Datafill
 163
 164                 DCD     0xFFFFFFFF                ; Datafill
 165                 DCD     0xFFFFFFFF                ; Datafill
 166                 DCD     0xFFFFFFFF                ; Datafill
 167                 DCD     0xFFFFFFFF                ; Datafill
 168                 DCD     0xFFFFFFFF                ; Datafill
 169                 DCD     0xFFFFFFFF                ; Datafill
 170                 DCD     0xFFFFFFFF                ; Datafill
 171                 DCD     0xFFFFFFFF                ; Datafill
 172                 DCD     0xFFFFFFFF                ; Datafill
 173                 DCD     0xFFFFFFFF                ; Datafill
 174
 175                 DCD     0xFFFFFFFF                ; Datafill
 176                 DCD     0xFFFFFFFF                ; Datafill
 177                 DCD     0xFFFFFFFF                ; Datafill
 178                 DCD     0xFFFFFFFF                ; Datafill
 179                 DCD     0xFFFFFFFF                ; Datafill
 180                 DCD     0xFFFFFFFF                ; Datafill
 181                 DCD     0xFFFFFFFF                ; Datafill
 182                 DCD     0xFFFFFFFF                ; Datafill
 183                 DCD     0xFFFFFFFF                ; Datafill
 184                 DCD     0xFFFFFFFF                ; Datafill
 185
 186 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 187 ;;
 188 ;; Default interrupt handlers.
 189 ;;
 190         THUMB
 191         PUBWEAK Reset_Handler
 192         SECTION .text:CODE:NOROOT:REORDER(2)
 193 Reset_Handler
 194         LDR     R0, =SystemInit
 195         BLX     R0
 196         LDR     R0, =__iar_program_start
 197         BX      R0
 198
 199         PUBWEAK NMI_Handler
 200         PUBWEAK HardFault_Handler
 201         PUBWEAK SVC_Handler
 202         PUBWEAK PendSV_Handler
 203         PUBWEAK SysTick_Handler
 204         PUBWEAK Reserved_IRQHandler
 205         PUBWEAK SLWU_INT0_IRQHandler
 206         PUBWEAK SLWU_INT1_IRQHandler
 207         PUBWEAK SLWU_INT2_IRQHandler
 208         PUBWEAK SLWU_INT3_IRQHandler
 209         PUBWEAK SLWU_INT4_IRQHandler
 210         PUBWEAK SLWU_INT5_IRQHandler
 211         PUBWEAK SLWU_INT6_IRQHandler
 212         PUBWEAK SLWU_INT7_IRQHandler
 213         PUBWEAK SLWU_INT8_IRQHandler
 214         PUBWEAK SLWU_INT9_IRQHandler
 215         PUBWEAK SLWU_INT10_IRQHandler
 216         PUBWEAK SLWU_INT11_IRQHandler
 217         PUBWEAK SLWU_INT12_IRQHandler
 218         PUBWEAK C_CAN_IRQHandler
 219         PUBWEAK SSP1_IRQHandler
 220         PUBWEAK I2C_IRQHandler
 221         PUBWEAK TIMER16_0_IRQHandler
 222         PUBWEAK TIMER16_1_IRQHandler
 223         PUBWEAK TIMER32_0_IRQHandler
 224         PUBWEAK TIMER32_1_IRQHandler
 225         PUBWEAK SSP0_IRQHandler
 226         PUBWEAK UART_IRQHandler
 227         PUBWEAK ADC_IRQHandler
 228         PUBWEAK WDT_IRQHandler
 229         PUBWEAK BOD_IRQHandler
 230         PUBWEAK PIO_3_IRQHandler
 231         PUBWEAK PIO_2_IRQHandler
 232         PUBWEAK PIO_1_IRQHandler
 233         PUBWEAK PIO_0_IRQHandler
 234
 235         SECTION .text:CODE:REORDER:NOROOT(1)
 236         THUMB
 237
 238 NMI_Handler
 239 HardFault_Handler
 240 SVC_Handler
 241 PendSV_Handler
 242 SysTick_Handler
 243 Reserved_IRQHandler
 244 SLWU_INT0_IRQHandler
 245 SLWU_INT1_IRQHandler
 246 SLWU_INT2_IRQHandler
 247 SLWU_INT3_IRQHandler
 248 SLWU_INT4_IRQHandler
 249 SLWU_INT5_IRQHandler
 250 SLWU_INT6_IRQHandler
 251 SLWU_INT7_IRQHandler
 252 SLWU_INT8_IRQHandler
 253 SLWU_INT9_IRQHandler
 254 SLWU_INT10_IRQHandler
 255 SLWU_INT11_IRQHandler
 256 SLWU_INT12_IRQHandler
 257 C_CAN_IRQHandler
 258 SSP1_IRQHandler
 259 I2C_IRQHandler
 260 TIMER16_0_IRQHandler
 261 TIMER16_1_IRQHandler
 262 TIMER32_0_IRQHandler
 263 TIMER32_1_IRQHandler
 264 SSP0_IRQHandler
 265 UART_IRQHandler
 266 ADC_IRQHandler
 267 WDT_IRQHandler
 268 BOD_IRQHandler
 269 PIO_3_IRQHandler
 270 PIO_2_IRQHandler
 271 PIO_1_IRQHandler
 272 PIO_0_IRQHandler
 273 Default_Handler
 274         B Default_Handler
 275
 276         SECTION .crp:CODE:ROOT(2)
 277         DATA
 278 /* Code Read Protection
 279 NO_ISP  0x4E697370 -  Prevents sampling of pin PIO0_1 for entering ISP mode
 280 CRP1    0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
 281                    - Copy RAM to flash command can not write to Sector 0.
 282                    - Erase command can erase Sector 0 only when all sectors
 283                      are selected for erase.
 284                    - Compare command is disabled.
 285                    - Read Memory command is disabled.
 286 CRP2    0x87654321 - Read Memory is disabled.
 287                    - Write to RAM is disabled.
 288                    - "Go" command is disabled.
 289                    - Copy RAM to flash is disabled.
 290                    - Compare is disabled.
 291 CRP3    0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
 292                      by pulling PIO0_1 LOW is disabled if a valid user code is
 293                      present in flash sector 0.
 294 Caution: If CRP3 is selected, no future factory testing can be
 295 performed on the device.
 296 */
 297         DCD     0xFFFFFFFF
 298
 299         END