tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/icc_regs.h

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  33
  34 #ifndef _MXC_ICC_REGS_H_
  35 #define _MXC_ICC_REGS_H_
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39 #endif
  40
  41 #include <stdint.h>
  42
  43 /**
  44  * @file  icc_regs.h
  45  * @addtogroup icc ICC
  46  * @{
  47  */
  48
  49 /*                                              Offset   Register Description
  50                                                 ======   =================================================== */
  51 typedef struct {
  52     __IO uint32_t id;                       /*  0x0000   Device ID Register                                  */
  53     __IO uint32_t mem_cfg;                  /*  0x0004   Memory Configuration                                */
  54     __I uint32_t rsv0008[62];               /*  0x0008                                                       */
  55     __IO uint32_t ctrl_stat;                /*  0x0100   Control and Status                                  */
  56     __I uint32_t rsv0104[383];              /*  0x0104                                                       */
  57     __IO uint32_t invdt_all;                /*  0x0700   Invalidate (Clear) Cache Control                    */
  58 } mxc_icc_regs_t;
  59
  60 /*
  61    Register offsets for module ICC.
  62 */
  63 #define MXC_R_ICC_OFFS_ID                       ((uint32_t)0x00000000UL)
  64 #define MXC_R_ICC_OFFS_MEM_CFG                  ((uint32_t)0x00000004UL)
  65 #define MXC_R_ICC_OFFS_CTRL_STAT                ((uint32_t)0x00000100UL)
  66 #define MXC_R_ICC_OFFS_INVDT_ALL                ((uint32_t)0x00000700UL)
  67
  68 /*
  69    Field positions and masks for module ICC.
  70 */
  71 #define MXC_F_ICC_ID_RTL_VERSION_POS            0
  72 #define MXC_F_ICC_ID_RTL_VERSION                ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS))
  73 #define MXC_F_ICC_ID_PART_NUM_POS               6
  74 #define MXC_F_ICC_ID_PART_NUM                   ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS))
  75 #define MXC_F_ICC_ID_CACHE_ID_POS               10
  76 #define MXC_F_ICC_ID_CACHE_ID                   ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS))
  77
  78 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS        0
  79 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE            ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS))
  80 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS  16
  81 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE      ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS))
  82
  83 #define MXC_F_ICC_CTRL_STAT_ENABLE_POS          0
  84 #define MXC_F_ICC_CTRL_STAT_ENABLE              ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS))
  85 #define MXC_F_ICC_CTRL_STAT_READY_POS           16
  86 #define MXC_F_ICC_CTRL_STAT_READY               ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS))
  87
  88 #ifdef __cplusplus
  89 }
  90 #endif
  91
  92 /**
  93 * @}
  94 */
  95
  96 #endif /* _MXC_ICC_REGS_H_ */