1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 // math.h required for floating point operations for baud rate calculation
17 #include "mbed_assert.h"
22 #include "serial_api.h"
27 /******************************************************************************
29 ******************************************************************************/
32 static const PinMap PinMap_UART_TX[] = {
44 static const PinMap PinMap_UART_RX[] = {
56 static const PinMap PinMap_UART_RTS[] = {
62 static const PinMap PinMap_UART_CTS[] = {
68 #define UART_MCR_RTSEN_MASK (1 << 6)
69 #define UART_MCR_CTSEN_MASK (1 << 7)
70 #define UART_MCR_FLOWCTRL_MASK (UART_MCR_RTSEN_MASK | UART_MCR_CTSEN_MASK)
72 static uart_irq_handler irq_handler;
74 int stdio_uart_inited = 0;
77 struct serial_global_data_s {
78 uint32_t serial_irq_id;
79 gpio_t sw_rts, sw_cts;
80 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
83 static struct serial_global_data_s uart_data[UART_NUM];
85 void serial_init(serial_t *obj, PinName tx, PinName rx) {
86 int is_stdio_uart = 0;
88 // determine the UART to use
89 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
90 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
91 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
92 MBED_ASSERT((int)uart != NC);
94 obj->uart = (LPC_UART_TypeDef *)uart;
97 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
98 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
99 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
100 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
103 // enable fifos and default rx trigger level
104 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
105 | 0 << 1 // Rx Fifo Reset
106 | 0 << 2 // Tx Fifo Reset
107 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
110 obj->uart->IER = 0 << 0 // Rx Data available irq enable
111 | 0 << 1 // Tx Fifo empty irq enable
112 | 0 << 2; // Rx Line Status irq enable
114 // set default baud rate and format
115 serial_baud (obj, 9600);
116 serial_format(obj, 8, ParityNone, 1);
118 // pinout the chosen uart
119 pinmap_pinout(tx, PinMap_UART_TX);
120 pinmap_pinout(rx, PinMap_UART_RX);
122 // set rx/tx pins in PullUp mode
124 pin_mode(tx, PullUp);
127 pin_mode(rx, PullUp);
131 case UART_0: obj->index = 0; break;
132 case UART_1: obj->index = 1; break;
133 case UART_2: obj->index = 2; break;
134 case UART_3: obj->index = 3; break;
136 uart_data[obj->index].sw_rts.pin = NC;
137 uart_data[obj->index].sw_cts.pin = NC;
138 serial_set_flow_control(obj, FlowControlNone, NC, NC);
140 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
143 stdio_uart_inited = 1;
144 memcpy(&stdio_uart, obj, sizeof(serial_t));
148 void serial_free(serial_t *obj) {
149 uart_data[obj->index].serial_irq_id = 0;
153 // set the baud rate, taking in to account the current SystemFrequency
154 void serial_baud(serial_t *obj, int baudrate) {
155 MBED_ASSERT((int)obj->uart <= UART_3);
156 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
157 // baud rate. The formula is:
159 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
162 // 0 <= DivAddVal < 14
163 // DivAddVal < MulVal
166 switch ((int)obj->uart) {
167 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
168 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
169 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
170 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
174 uint32_t PCLK = SystemCoreClock;
176 // First we check to see if the basic divide with no DivAddVal/MulVal
177 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
178 // MulVal = 1. Otherwise, we search the valid ratio value range to find
179 // the closest match. This could be more elegant, using search methods
180 // and/or lookup tables, but the brute force method is not that much
181 // slower, and is more maintainable.
182 uint16_t DL = PCLK / (16 * baudrate);
184 uint8_t DivAddVal = 0;
189 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
190 int err_best = baudrate, b;
191 for (mv = 1; mv < 16 && !hit; mv++)
193 for (dav = 0; dav < mv; dav++)
195 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
196 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
197 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
198 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
199 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
201 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
202 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
203 else // 2 bits headroom, use more precision
204 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
206 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
210 // datasheet says if dav > 0 then DL must be >= 2
211 if ((dav > 0) && (dlv < 2))
214 // integer rearrangement of the baudrate equation (with rounding)
215 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
217 // check to see how we went
218 b = abs(b - baudrate);
237 // set LCR[DLAB] to enable writing to divider registers
238 obj->uart->LCR |= (1 << 7);
240 // set divider values
241 obj->uart->DLM = (DL >> 8) & 0xFF;
242 obj->uart->DLL = (DL >> 0) & 0xFF;
243 obj->uart->FDR = (uint32_t) DivAddVal << 0
244 | (uint32_t) MulVal << 4;
247 obj->uart->LCR &= ~(1 << 7);
250 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
251 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
252 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
253 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
254 (parity == ParityForced1) || (parity == ParityForced0));
259 int parity_enable, parity_select;
261 case ParityNone: parity_enable = 0; parity_select = 0; break;
262 case ParityOdd : parity_enable = 1; parity_select = 0; break;
263 case ParityEven: parity_enable = 1; parity_select = 1; break;
264 case ParityForced1: parity_enable = 1; parity_select = 2; break;
265 case ParityForced0: parity_enable = 1; parity_select = 3; break;
267 parity_enable = 0, parity_select = 0;
271 obj->uart->LCR = data_bits << 0
274 | parity_select << 4;
277 /******************************************************************************
278 * INTERRUPTS HANDLING
279 ******************************************************************************/
280 static inline void uart_irq(uint32_t iir, uint32_t index, LPC_UART_TypeDef *puart) {
281 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
284 case 1: irq_type = TxIrq; break;
285 case 2: irq_type = RxIrq; break;
288 if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
289 gpio_write(&uart_data[index].sw_rts, 1);
290 // Disable interrupt if it wasn't enabled by other part of the application
291 if (!uart_data[index].rx_irq_set_api)
292 puart->IER &= ~(1 << RxIrq);
294 if (uart_data[index].serial_irq_id != 0)
295 if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
296 irq_handler(uart_data[index].serial_irq_id, irq_type);
299 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0, (LPC_UART_TypeDef*)LPC_UART0);}
300 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_UART_TypeDef*)LPC_UART1);}
301 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2, (LPC_UART_TypeDef*)LPC_UART2);}
302 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3, (LPC_UART_TypeDef*)LPC_UART3);}
304 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
305 irq_handler = handler;
306 uart_data[obj->index].serial_irq_id = id;
309 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
310 IRQn_Type irq_n = (IRQn_Type)0;
312 switch ((int)obj->uart) {
313 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
314 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
315 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
316 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
320 obj->uart->IER |= 1 << irq;
321 NVIC_SetVector(irq_n, vector);
322 NVIC_EnableIRQ(irq_n);
323 } else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
324 int all_disabled = 0;
325 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
326 obj->uart->IER &= ~(1 << irq);
327 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
329 NVIC_DisableIRQ(irq_n);
333 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
335 uart_data[obj->index].rx_irq_set_api = enable;
336 serial_irq_set_internal(obj, irq, enable);
339 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
340 uart_data[obj->index].rx_irq_set_flow = enable;
341 serial_irq_set_internal(obj, RxIrq, enable);
344 /******************************************************************************
346 ******************************************************************************/
347 int serial_getc(serial_t *obj) {
348 while (!serial_readable(obj));
349 int data = obj->uart->RBR;
350 if (NC != uart_data[obj->index].sw_rts.pin) {
351 gpio_write(&uart_data[obj->index].sw_rts, 0);
352 obj->uart->IER |= 1 << RxIrq;
357 void serial_putc(serial_t *obj, int c) {
358 while (!serial_writable(obj));
360 uart_data[obj->index].count++;
363 int serial_readable(serial_t *obj) {
364 return obj->uart->LSR & 0x01;
367 int serial_writable(serial_t *obj) {
369 if (NC != uart_data[obj->index].sw_cts.pin)
370 isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
372 if (obj->uart->LSR & 0x20)
373 uart_data[obj->index].count = 0;
374 else if (uart_data[obj->index].count >= 16)
380 void serial_clear(serial_t *obj) {
381 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
382 | 1 << 1 // rx FIFO reset
383 | 1 << 2 // tx FIFO reset
384 | 0 << 6; // interrupt depth
387 void serial_pinout_tx(PinName tx) {
388 pinmap_pinout(tx, PinMap_UART_TX);
391 void serial_break_set(serial_t *obj) {
392 obj->uart->LCR |= (1 << 6);
395 void serial_break_clear(serial_t *obj) {
396 obj->uart->LCR &= ~(1 << 6);
399 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
400 // Only UART1 has hardware flow control on LPC176x
401 LPC_UART1_TypeDef *uart1 = (uint32_t)obj->uart == (uint32_t)LPC_UART1 ? LPC_UART1 : NULL;
402 int index = obj->index;
404 // First, disable flow control completely
406 uart1->MCR = uart1->MCR & ~UART_MCR_FLOWCTRL_MASK;
407 uart_data[index].sw_rts.pin = uart_data[index].sw_cts.pin = NC;
408 serial_flow_irq_set(obj, 0);
409 if (FlowControlNone == type)
411 // Check type(s) of flow control to use
412 UARTName uart_rts = (UARTName)pinmap_find_peripheral(rxflow, PinMap_UART_RTS);
413 UARTName uart_cts = (UARTName)pinmap_find_peripheral(txflow, PinMap_UART_CTS);
414 if (((FlowControlCTS == type) || (FlowControlRTSCTS == type)) && (NC != txflow)) {
415 // Can this be enabled in hardware?
416 if ((UART_1 == uart_cts) && (NULL != uart1)) {
417 // Enable auto-CTS mode
418 uart1->MCR |= UART_MCR_CTSEN_MASK;
419 pinmap_pinout(txflow, PinMap_UART_CTS);
421 // Can't enable in hardware, use software emulation
422 gpio_init_in(&uart_data[index].sw_cts, txflow);
425 if (((FlowControlRTS == type) || (FlowControlRTSCTS == type)) && (NC != rxflow)) {
426 // Enable FIFOs, trigger level of 1 char on RX FIFO
427 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
428 | 1 << 1 // Rx Fifo Reset
429 | 1 << 2 // Tx Fifo Reset
430 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
431 // Can this be enabled in hardware?
432 if ((UART_1 == uart_rts) && (NULL != uart1)) {
433 // Enable auto-RTS mode
434 uart1->MCR |= UART_MCR_RTSEN_MASK;
435 pinmap_pinout(rxflow, PinMap_UART_RTS);
436 } else { // can't enable in hardware, use software emulation
437 gpio_init_out_ex(&uart_data[index].sw_rts, rxflow, 0);
438 // Enable RX interrupt
439 serial_flow_irq_set(obj, 1);