1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
19 #include "mbed_error.h"
25 #define MSG_OBJ_MAX 32
28 #define ID_STD_MASK 0x07FF
29 #define ID_EXT_MASK 0x1FFFFFFF
32 static uint32_t can_irq_id = 0;
33 static can_irq_handler irq_handler;
35 static uint32_t can_disable(can_t *obj) {
36 uint32_t sm = LPC_CAN->CNTL;
37 LPC_CAN->CNTL |= CANCNTL_INIT;
41 static inline void can_enable(can_t *obj) {
42 if (LPC_CAN->CNTL & CANCNTL_INIT) {
43 LPC_CAN->CNTL &= ~CANCNTL_INIT;
47 int can_mode(can_t *obj, CanMode mode) {
48 return 0; // not implemented
51 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) {
54 // Find first free message object
56 uint32_t msgval = LPC_CAN->MSGV1 | (LPC_CAN->MSGV2 << 16);
57 // Find first free messagebox
58 for(i = 0; i < 32; i++) {
59 if((msgval & (1 << i)) == 0) {
66 if(handle > 0 && handle < 32) {
67 if(format == CANExtended) {
68 // Mark message valid, Direction = TX, Extended Frame, Set Identifier and mask everything
69 LPC_CAN->IF1_ARB1 = BFN_PREP(id, CANIFn_ARB1_ID);
70 LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | CANIFn_ARB2_XTD | BFN_PREP(id >> 16, CANIFn_ARB2_ID);
71 LPC_CAN->IF1_MSK1 = BFN_PREP(mask, CANIFn_MSK1_MSK);
72 LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MXTD /* | CANIFn_MSK2_MDIR */ | BFN_PREP(mask >> 16, CANIFn_MSK2_MSK);
75 // Mark message valid, Direction = TX, Set Identifier and mask everything
76 LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | BFN_PREP(id << 2, CANIFn_ARB2_ID);
77 LPC_CAN->IF1_MSK2 = /* CANIFn_MSK2_MDIR | */ BFN_PREP(mask << 2, CANIFn_MSK2_MSK);
80 // Use mask, single message object and set DLC
81 LPC_CAN->IF1_MCTRL = CANIFn_MCTRL_UMASK | CANIFn_MCTRL_EOB | CANIFn_MCTRL_RXIE | BFN_PREP(DLC_MAX, CANIFn_MCTRL_DLC);
83 // Transfer all fields to message object
84 LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL;
86 // Start Transfer to given message number
87 LPC_CAN->IF1_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN);
89 // Wait until transfer to message ram complete - TODO: maybe not block??
90 while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY );
96 static inline void can_irq() {
97 irq_handler(can_irq_id, IRQ_RX);
100 // Register CAN object's irq handler
101 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
102 irq_handler = handler;
106 // Unregister CAN object's irq handler
107 void can_irq_free(can_t *obj) {
108 LPC_CAN->CNTL &= ~CANCNTL_IE; // Disable Interrupts :)
111 NVIC_DisableIRQ(CAN_IRQn);
114 // Clear or set a irq
115 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
116 // Put CAN in Reset Mode and enable interrupt
119 LPC_CAN->CNTL &= ~(CANCNTL_IE | CANCNTL_SIE);
122 LPC_CAN->CNTL |= CANCNTL_IE | CANCNTL_SIE;
124 // Take it out of reset...
127 // Enable NVIC if at least 1 interrupt is active
128 NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq);
129 NVIC_EnableIRQ(CAN_IRQn);
132 // This table has the sampling points as close to 75% as possible. The first
133 // value is TSEG1, the second TSEG2.
134 static const int timing_pts[23][2] = {
135 {0x0, 0x0}, // 2, 50%
136 {0x1, 0x0}, // 3, 67%
137 {0x2, 0x0}, // 4, 75%
138 {0x3, 0x0}, // 5, 80%
139 {0x3, 0x1}, // 6, 67%
140 {0x4, 0x1}, // 7, 71%
141 {0x5, 0x1}, // 8, 75%
142 {0x6, 0x1}, // 9, 78%
143 {0x6, 0x2}, // 10, 70%
144 {0x7, 0x2}, // 11, 73%
145 {0x8, 0x2}, // 12, 75%
146 {0x9, 0x2}, // 13, 77%
147 {0x9, 0x3}, // 14, 71%
148 {0xA, 0x3}, // 15, 73%
149 {0xB, 0x3}, // 16, 75%
150 {0xC, 0x3}, // 17, 76%
151 {0xD, 0x3}, // 18, 78%
152 {0xD, 0x4}, // 19, 74%
153 {0xE, 0x4}, // 20, 75%
154 {0xF, 0x4}, // 21, 76%
155 {0xF, 0x5}, // 22, 73%
156 {0xF, 0x6}, // 23, 70%
157 {0xF, 0x7}, // 24, 67%
160 static unsigned int can_speed(unsigned int sclk, unsigned int cclk, unsigned char psjw) {
169 bitwidth = sclk / cclk;
171 brp = bitwidth / 0x18;
172 while ((!hit) && (brp < bitwidth / 4)) {
174 for (bits = 22; bits > 0; bits--) {
175 calcbit = (bits + 3) * (brp + 1);
176 if (calcbit == bitwidth) {
183 /* This might be funky
184 while(btr > 63 && clkdiv < 16) {
192 btr = BFN_PREP(timing_pts[bits][1], CANBT_TSEG2)
193 | BFN_PREP(timing_pts[bits][0], CANBT_TSEG1)
194 | BFN_PREP(psjw, CANBT_SJW)
195 | BFN_PREP(brp, CANBT_BRP);
196 btr = btr | (clkdiv << 16);
206 int can_config_rxmsgobj(can_t *obj) {
209 // Make sure the interface is available
210 //while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY );
212 // Mark message valid, Direction = RX, Don't care about anything else
213 LPC_CAN->IF1_ARB1 = 0;
214 LPC_CAN->IF1_ARB2 = 0;
215 LPC_CAN->IF1_MCTRL = 0;
217 for ( i = 0; i < MSG_OBJ_MAX; i++ )
219 // Transfer arb and control fields to message object
220 LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_TXRQST;
222 // Start Transfer to given message number
223 LPC_CAN->IF1_CMDREQ = BFN_PREP(i, CANIFn_CMDREQ_MN);
225 // Wait until transfer to message ram complete - TODO: maybe not block??
226 while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY );
229 // Accept all messages
230 can_filter(obj, 0, 0, CANStandard, 1);
236 void can_init(can_t *obj, PinName rd, PinName td) {
237 // Enable power and clock
238 LPC_SYSCON->PRESETCTRL |= PRESETCTRL_CAN_RST_N;
239 LPC_SYSCON->SYSAHBCLKCTRL |= SYSAHBCLKCTRL_CAN;
241 // Enable Initialization mode
242 if (!(LPC_CAN->CNTL & CANCNTL_INIT)) {
243 LPC_CAN->CNTL |= CANCNTL_INIT;
246 can_frequency(obj, 125000);
249 LPC_CAN->CNTL &= ~CANCNTL_INIT;
250 while ( LPC_CAN->CNTL & CANCNTL_INIT );
252 // Initialize RX message object
253 can_config_rxmsgobj(obj);
256 void can_free(can_t *obj) {
257 LPC_SYSCON->SYSAHBCLKCTRL &= ~(SYSAHBCLKCTRL_CAN);
258 LPC_SYSCON->PRESETCTRL &= ~(PRESETCTRL_CAN_RST_N);
261 int can_frequency(can_t *obj, int f) {
262 int btr = can_speed(SystemCoreClock, (unsigned int)f, 1);
263 int clkdiv = (btr >> 16) & 0x0F;
267 uint32_t cntl_init = LPC_CAN->CNTL | CANCNTL_INIT;
269 LPC_CAN->CNTL |= CANCNTL_CCE | CANCNTL_INIT;
270 LPC_CAN->CLKDIV = clkdiv;
272 LPC_CAN->BRPE = 0x0000;
273 LPC_CAN->CNTL &= ~(CANCNTL_CCE | CANCNTL_INIT);
274 LPC_CAN->CNTL |= cntl_init;
280 int can_write(can_t *obj, CAN_Message msg, int cc) {
283 // Make sure controller is enabled
286 // Make sure the interface is available
287 while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY );
289 // Set the direction bit based on the message type
290 uint32_t direction = 0;
291 if (msg.type == CANData) {
292 direction = CANIFn_ARB2_DIR;
295 if(msg.format == CANExtended) {
296 // Mark message valid, Extended Frame, Set Identifier and mask everything
297 LPC_CAN->IF1_ARB1 = BFN_PREP(msg.id, CANIFn_ARB1_ID);
298 LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | CANIFn_ARB2_XTD | direction | BFN_PREP(msg.id >> 16, CANIFn_ARB2_ID);
299 LPC_CAN->IF1_MSK1 = BFN_PREP(ID_EXT_MASK, CANIFn_MSK1_MSK);
300 LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MXTD | CANIFn_MSK2_MDIR | BFN_PREP(ID_EXT_MASK >> 16, CANIFn_MSK2_MSK);
303 // Mark message valid, Set Identifier and mask everything
304 LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | direction | BFN_PREP(msg.id << 2, CANIFn_ARB2_ID);
305 LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MDIR | BFN_PREP(ID_STD_MASK << 2, CANIFn_MSK2_MSK);
308 // Use mask, request transmission, single message object and set DLC
309 LPC_CAN->IF1_MCTRL = CANIFn_MCTRL_UMASK | CANIFn_MCTRL_TXRQST | CANIFn_MCTRL_EOB | BFN_PREP(msg.len, CANIFn_MCTRL_DLC);
311 LPC_CAN->IF1_DA1 = BFN_PREP(msg.data[1], CANIFn_DA1_DATA1) | BFN_PREP(msg.data[0], CANIFn_DA1_DATA0);
312 LPC_CAN->IF1_DA2 = BFN_PREP(msg.data[3], CANIFn_DA2_DATA3) | BFN_PREP(msg.data[2], CANIFn_DA2_DATA2);
313 LPC_CAN->IF1_DB1 = BFN_PREP(msg.data[5], CANIFn_DB1_DATA5) | BFN_PREP(msg.data[4], CANIFn_DB1_DATA4);
314 LPC_CAN->IF1_DB2 = BFN_PREP(msg.data[7], CANIFn_DB2_DATA7) | BFN_PREP(msg.data[6], CANIFn_DB2_DATA6);
316 // Transfer all fields to message object
317 LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_TXRQST | CANIFn_CMDMSK_DATA_A | CANIFn_CMDMSK_DATA_B;
319 // Start Transfer to given message number
320 LPC_CAN->IF1_CMDREQ = BFN_PREP(msgnum, CANIFn_CMDREQ_MN);
322 // Wait until transfer to message ram complete - TODO: maybe not block??
323 while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY);
325 // Wait until TXOK is set, then clear it - TODO: maybe not block
326 //while( !(LPC_CAN->STAT & CANSTAT_TXOK) );
327 LPC_CAN->STAT &= ~(CANSTAT_TXOK);
332 int can_read(can_t *obj, CAN_Message *msg, int handle) {
335 // Make sure controller is enabled
338 // Find first message object with new data
340 uint32_t newdata = LPC_CAN->ND1 | (LPC_CAN->ND2 << 16);
341 // Find first free messagebox
342 for(i = 0; i < 32; i++) {
343 if(newdata & (1 << i)) {
350 if(handle > 0 && handle < 32) {
351 // Wait until message interface is free
352 while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY );
354 // Transfer all fields to message object
355 LPC_CAN->IF2_CMDMSK = CANIFn_CMDMSK_RD | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_CLRINTPND | CANIFn_CMDMSK_TXRQST | CANIFn_CMDMSK_DATA_A | CANIFn_CMDMSK_DATA_B;
357 // Start Transfer from given message number
358 LPC_CAN->IF2_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN);
360 // Wait until transfer to message ram complete
361 while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY );
363 if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) {
364 msg->format = CANExtended;
365 msg->id = (LPC_CAN->IF2_ARB1 & CANIFn_ARB2_ID_MASK) << 16;
366 msg->id |= (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK);
369 msg->format = CANStandard;
370 msg->id = (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK) >> 2;
373 if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_DIR) {
374 msg->type = CANRemote;
380 msg->len = BFN_GET(LPC_CAN->IF2_MCTRL, CANIFn_MCTRL_DLC); // TODO: If > 8, len = 8
381 msg->data[0] = BFN_GET(LPC_CAN->IF2_DA1, CANIFn_DA1_DATA0);
382 msg->data[1] = BFN_GET(LPC_CAN->IF2_DA1, CANIFn_DA1_DATA1);
383 msg->data[2] = BFN_GET(LPC_CAN->IF2_DA2, CANIFn_DA2_DATA2);
384 msg->data[3] = BFN_GET(LPC_CAN->IF2_DA2, CANIFn_DA2_DATA3);
385 msg->data[4] = BFN_GET(LPC_CAN->IF2_DB1, CANIFn_DB1_DATA4);
386 msg->data[5] = BFN_GET(LPC_CAN->IF2_DB1, CANIFn_DB1_DATA5);
387 msg->data[6] = BFN_GET(LPC_CAN->IF2_DB2, CANIFn_DB2_DATA6);
388 msg->data[7] = BFN_GET(LPC_CAN->IF2_DB2, CANIFn_DB2_DATA7);
390 LPC_CAN->STAT &= ~(CANSTAT_RXOK);
397 void can_reset(can_t *obj) {
398 LPC_SYSCON->PRESETCTRL &= ~PRESETCTRL_CAN_RST_N;
401 can_config_rxmsgobj(obj);
404 unsigned char can_rderror(can_t *obj) {
405 return BFN_GET(LPC_CAN->EC, CANEC_REC);
408 unsigned char can_tderror(can_t *obj) {
409 return BFN_GET(LPC_CAN->EC, CANEC_TEC);
412 void can_monitor(can_t *obj, int silent) {
414 LPC_CAN->CNTL |= CANCNTL_TEST;
415 LPC_CAN->TEST |= CANTEST_SILENT;
417 LPC_CAN->CNTL &= ~(CANCNTL_TEST);
418 LPC_CAN->TEST &= ~CANTEST_SILENT;
421 if (!(LPC_CAN->CNTL & CANCNTL_INIT)) {
422 LPC_CAN->CNTL |= CANCNTL_INIT;