1 ;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
2 ;* File Name : startup_stm32l073xx.s
3 ;* Author : MCD Application Team
5 ;* Date : 06-February-2015
6 ;* Description : STM32L073xx Ultra Low Power Devices vector
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == _iar_program_start,
10 ;* - Set the vector table entries with the exceptions ISR
12 ;* - Configure the system clock
13 ;* - Branches to main in the C library (which eventually
15 ;* After Reset the Cortex-M0+ processor is in Thread mode,
16 ;* priority is Privileged, and the Stack is set to Main.
17 ;********************************************************************************
19 ;* Redistribution and use in source and binary forms, with or without modification,
20 ;* are permitted provided that the following conditions are met:
21 ;* 1. Redistributions of source code must retain the above copyright notice,
22 ;* this list of conditions and the following disclaimer.
23 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
24 ;* this list of conditions and the following disclaimer in the documentation
25 ;* and/or other materials provided with the distribution.
26 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
27 ;* may be used to endorse or promote products derived from this software
28 ;* without specific prior written permission.
30 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
34 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
36 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
38 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 ;*******************************************************************************/
44 ; The modules in this file are included in the libraries, and may be replaced
45 ; by any user-defined modules that define the PUBLIC symbol _program_start or
46 ; a user defined start symbol.
47 ; To override the cstartup defined in the library, simply add your modified
48 ; version to the workbench project.
50 ; The vector table is normally located at address 0.
51 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
52 ; The name "__vector_table" has special meaning for C-SPY:
53 ; it is where the SP start value is found, and the NVIC vector
54 ; table register (VTOR) is initialized to this address if != 0.
61 ;; Forward declaration of sections.
62 SECTION CSTACK:DATA:NOROOT(3)
64 SECTION .intvec:CODE:NOROOT(2)
66 EXTERN __iar_program_start
73 DCD Reset_Handler ; Reset Handler
75 DCD NMI_Handler ; NMI Handler
76 DCD HardFault_Handler ; Hard Fault Handler
84 DCD SVC_Handler ; SVCall Handler
85 DCD DebugMon_Handler ; Debug Monitor Handler
87 DCD PendSV_Handler ; PendSV Handler
88 DCD SysTick_Handler ; SysTick Handler
91 DCD WWDG_IRQHandler ; Window Watchdog
92 DCD PVD_IRQHandler ; PVD through EXTI Line detect
93 DCD RTC_IRQHandler ; RTC through EXTI Line
94 DCD FLASH_IRQHandler ; FLASH
95 DCD RCC_CRS_IRQHandler ; RCC_CRS
96 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
97 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
98 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
99 DCD TSC_IRQHandler ; TSC
100 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
101 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
102 DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
103 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
104 DCD LPTIM1_IRQHandler ; LPTIM1
105 DCD USART4_5_IRQHandler ; USART4 and USART5
106 DCD TIM2_IRQHandler ; TIM2
107 DCD TIM3_IRQHandler ; TIM3
108 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
109 DCD TIM7_IRQHandler ; TIM7
111 DCD TIM21_IRQHandler ; TIM21
112 DCD I2C3_IRQHandler ; I2C3
113 DCD TIM22_IRQHandler ; TIM22
114 DCD I2C1_IRQHandler ; I2C1
115 DCD I2C2_IRQHandler ; I2C2
116 DCD SPI1_IRQHandler ; SPI1
117 DCD SPI2_IRQHandler ; SPI2
118 DCD USART1_IRQHandler ; USART1
119 DCD USART2_IRQHandler ; USART2
120 DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
121 DCD LCD_IRQHandler ; LCD
122 DCD USB_IRQHandler ; USB
124 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
126 ;; Default interrupt handlers.
129 PUBWEAK Reset_Handler
130 SECTION .text:CODE:NOROOT:REORDER(2)
134 LDR R0, =__iar_program_start
138 SECTION .text:CODE:NOROOT:REORDER(1)
143 PUBWEAK HardFault_Handler
144 SECTION .text:CODE:NOROOT:REORDER(1)
150 SECTION .text:CODE:NOROOT:REORDER(1)
155 PUBWEAK DebugMon_Handler
156 SECTION .text:CODE:NOROOT:REORDER(1)
161 PUBWEAK PendSV_Handler
162 SECTION .text:CODE:NOROOT:REORDER(1)
167 PUBWEAK SysTick_Handler
168 SECTION .text:CODE:NOROOT:REORDER(1)
173 PUBWEAK WWDG_IRQHandler
174 SECTION .text:CODE:NOROOT:REORDER(1)
179 PUBWEAK PVD_IRQHandler
180 SECTION .text:CODE:NOROOT:REORDER(1)
185 PUBWEAK RTC_IRQHandler
186 SECTION .text:CODE:NOROOT:REORDER(1)
191 PUBWEAK FLASH_IRQHandler
192 SECTION .text:CODE:NOROOT:REORDER(1)
197 PUBWEAK RCC_CRS_IRQHandler
198 SECTION .text:CODE:NOROOT:REORDER(1)
203 PUBWEAK EXTI0_1_IRQHandler
204 SECTION .text:CODE:NOROOT:REORDER(1)
209 PUBWEAK EXTI2_3_IRQHandler
210 SECTION .text:CODE:NOROOT:REORDER(1)
215 PUBWEAK EXTI4_15_IRQHandler
216 SECTION .text:CODE:NOROOT:REORDER(1)
218 B EXTI4_15_IRQHandler
221 PUBWEAK TSC_IRQHandler
222 SECTION .text:CODE:NOROOT:REORDER(1)
227 PUBWEAK DMA1_Channel1_IRQHandler
228 SECTION .text:CODE:NOROOT:REORDER(1)
229 DMA1_Channel1_IRQHandler
230 B DMA1_Channel1_IRQHandler
233 PUBWEAK DMA1_Channel2_3_IRQHandler
234 SECTION .text:CODE:NOROOT:REORDER(1)
235 DMA1_Channel2_3_IRQHandler
236 B DMA1_Channel2_3_IRQHandler
239 PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
240 SECTION .text:CODE:NOROOT:REORDER(1)
241 DMA1_Channel4_5_6_7_IRQHandler
242 B DMA1_Channel4_5_6_7_IRQHandler
245 PUBWEAK ADC1_COMP_IRQHandler
246 SECTION .text:CODE:NOROOT:REORDER(1)
248 B ADC1_COMP_IRQHandler
251 PUBWEAK LPTIM1_IRQHandler
252 SECTION .text:CODE:NOROOT:REORDER(1)
257 PUBWEAK USART4_5_IRQHandler
258 SECTION .text:CODE:NOROOT:REORDER(1)
260 B USART4_5_IRQHandler
263 PUBWEAK TIM2_IRQHandler
264 SECTION .text:CODE:NOROOT:REORDER(1)
269 PUBWEAK TIM3_IRQHandler
270 SECTION .text:CODE:NOROOT:REORDER(1)
275 PUBWEAK TIM6_DAC_IRQHandler
276 SECTION .text:CODE:NOROOT:REORDER(1)
278 B TIM6_DAC_IRQHandler
280 PUBWEAK TIM7_IRQHandler
281 SECTION .text:CODE:NOROOT:REORDER(1)
285 PUBWEAK TIM21_IRQHandler
286 SECTION .text:CODE:NOROOT:REORDER(1)
290 PUBWEAK I2C3_IRQHandler
291 SECTION .text:CODE:NOROOT:REORDER(1)
295 PUBWEAK TIM22_IRQHandler
296 SECTION .text:CODE:NOROOT:REORDER(1)
301 PUBWEAK I2C1_IRQHandler
302 SECTION .text:CODE:NOROOT:REORDER(1)
307 PUBWEAK I2C2_IRQHandler
308 SECTION .text:CODE:NOROOT:REORDER(1)
313 PUBWEAK SPI1_IRQHandler
314 SECTION .text:CODE:NOROOT:REORDER(1)
319 PUBWEAK SPI2_IRQHandler
320 SECTION .text:CODE:NOROOT:REORDER(1)
325 PUBWEAK USART1_IRQHandler
326 SECTION .text:CODE:NOROOT:REORDER(1)
331 PUBWEAK USART2_IRQHandler
332 SECTION .text:CODE:NOROOT:REORDER(1)
337 PUBWEAK RNG_LPUART1_IRQHandler
338 SECTION .text:CODE:NOROOT:REORDER(1)
339 RNG_LPUART1_IRQHandler
340 B RNG_LPUART1_IRQHandler
343 PUBWEAK LCD_IRQHandler
344 SECTION .text:CODE:NOROOT:REORDER(1)
348 PUBWEAK USB_IRQHandler
349 SECTION .text:CODE:NOROOT:REORDER(1)
354 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****