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[qmk_firmware.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_NXP / TARGET_LPC408X / TOOLCHAIN_IAR / startup_LPC408x.s
1 /**************************************************
2  *
3  * Part one of the system initialization code, contains low-level
4  * initialization, plain thumb variant.
5  *
6  * Copyright 2011 IAR Systems. All rights reserved.
7  *
8  * $Revision: 47876 $
9  *
10  **************************************************/
11
12 ;
13 ; The modules in this file are included in the libraries, and may be replaced
14 ; by any user-defined modules that define the PUBLIC symbol _program_start or
15 ; a user defined start symbol.
16 ; To override the cstartup defined in the library, simply add your modified
17 ; version to the workbench project.
18 ;
19 ; The vector table is normally located at address 0.
20 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
21 ; The name "__vector_table" has special meaning for C-SPY:
22 ; it is where the SP start value is found, and the NVIC vector
23 ; table register (VTOR) is initialized to this address if != 0.
24 ;
25 ; Cortex-M version
26 ;
27
28
29         MODULE  ?cstartup
30
31         ;; Forward declaration of sections.
32         SECTION CSTACK:DATA:NOROOT(3)
33
34         SECTION .intvec:CODE:NOROOT(2)
35
36         EXTERN  __iar_program_start 
37         EXTERN  SystemInit        
38         PUBLIC  __vector_table
39         PUBLIC  __vector_table_0x1c
40         PUBLIC  __Vectors
41         PUBLIC  __Vectors_End
42         PUBLIC  __Vectors_Size
43
44         DATA
45
46 __vector_table
47         DCD     sfe(CSTACK)
48         DCD     Reset_Handler
49         DCD     NMI_Handler
50         DCD     HardFault_Handler
51         DCD     MemManage_Handler
52         DCD     BusFault_Handler
53         DCD     UsageFault_Handler
54 __vector_table_0x1c
55         DCD     0xEFFFF39E                ; Reserved- vector sum
56         DCD     0
57         DCD     0
58         DCD     0
59         DCD     SVC_Handler
60         DCD     DebugMon_Handler
61         DCD     0
62         DCD     PendSV_Handler
63         DCD     SysTick_Handler
64
65         ; External Interrupts
66         DCD     WDT_IRQHandler            ; 16: Watchdog Timer
67                 DCD     TIMER0_IRQHandler         ; 17: Timer0
68                 DCD     TIMER1_IRQHandler         ; 18: Timer1
69                 DCD     TIMER2_IRQHandler         ; 19: Timer2
70                 DCD     TIMER3_IRQHandler         ; 20: Timer3
71                 DCD     UART0_IRQHandler          ; 21: UART0
72                 DCD     UART1_IRQHandler          ; 22: UART1
73                 DCD     UART2_IRQHandler          ; 23: UART2
74                 DCD     UART3_IRQHandler          ; 24: UART3
75                 DCD     PWM1_IRQHandler           ; 25: PWM1
76                 DCD     I2C0_IRQHandler           ; 26: I2C0
77                 DCD     I2C1_IRQHandler           ; 27: I2C1
78                 DCD     I2C2_IRQHandler           ; 28: I2C2
79                 DCD     0                         ; 29: reserved, not for SPIFI anymore
80                 DCD     SSP0_IRQHandler           ; 30: SSP0
81                 DCD     SSP1_IRQHandler           ; 31: SSP1
82                 DCD     PLL0_IRQHandler           ; 32: PLL0 Lock (Main PLL)
83                 DCD     RTC_IRQHandler            ; 33: Real Time Clock
84                 DCD     EINT0_IRQHandler          ; 34: External Interrupt 0
85                 DCD     EINT1_IRQHandler          ; 35: External Interrupt 1
86                 DCD     EINT2_IRQHandler          ; 36: External Interrupt 2
87                 DCD     EINT3_IRQHandler          ; 37: External Interrupt 3
88                 DCD     ADC_IRQHandler            ; 38: A/D Converter
89                 DCD     BOD_IRQHandler            ; 39: Brown-Out Detect
90                 DCD     USB_IRQHandler            ; 40: USB
91                 DCD     CAN_IRQHandler            ; 41: CAN
92                 DCD     DMA_IRQHandler            ; 42: General Purpose DMA
93                 DCD     I2S_IRQHandler            ; 43: I2S
94                 DCD     ENET_IRQHandler           ; 44: Ethernet
95                 DCD     MCI_IRQHandler            ; 45: SD/MMC card I/F
96                 DCD     MCPWM_IRQHandler          ; 46: Motor Control PWM
97                 DCD     QEI_IRQHandler            ; 47: Quadrature Encoder Interface
98                 DCD     PLL1_IRQHandler           ; 48: PLL1 Lock (USB PLL)
99                 DCD     USBActivity_IRQHandler    ; 49: USB Activity interrupt to wakeup
100                 DCD     CANActivity_IRQHandler    ; 50: CAN Activity interrupt to wakeup
101                 DCD     UART4_IRQHandler          ; 51: UART4
102                 DCD     SSP2_IRQHandler           ; 52: SSP2
103                 DCD     LCD_IRQHandler            ; 53: LCD
104                 DCD     GPIO_IRQHandler           ; 54: GPIO
105                 DCD     PWM0_IRQHandler           ; 55: PWM0
106                 DCD     EEPROM_IRQHandler         ; 56: EEPROM
107 __Vectors_End
108
109 __Vectors       EQU   __vector_table
110 __Vectors_Size  EQU   __Vectors_End - __Vectors
111
112 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
113 ;;
114 ;; Default interrupt handlers.
115 ;;
116 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
117
118         THUMB
119         PUBWEAK Reset_Handler
120         SECTION .text:CODE:NOROOT:REORDER(2)
121 Reset_Handler
122         LDR     R0, =SystemInit
123         BLX     R0
124         LDR     R0, =__iar_program_start
125         BX      R0
126   
127         PUBWEAK NMI_Handler       
128         PUBWEAK HardFault_Handler
129         PUBWEAK MemManage_Handler 
130         PUBWEAK BusFault_Handler
131         PUBWEAK UsageFault_Handler
132         PUBWEAK SVC_Handler
133         PUBWEAK DebugMon_Handler
134         PUBWEAK PendSV_Handler
135         PUBWEAK SysTick_Handler
136         PUBWEAK WDT_IRQHandler
137         PUBWEAK TIMER0_IRQHandler
138         PUBWEAK TIMER1_IRQHandler
139         PUBWEAK TIMER2_IRQHandler
140         PUBWEAK TIMER3_IRQHandler
141         PUBWEAK UART0_IRQHandler
142         PUBWEAK UART1_IRQHandler
143         PUBWEAK UART2_IRQHandler
144         PUBWEAK UART3_IRQHandler
145         PUBWEAK PWM1_IRQHandler
146         PUBWEAK I2C0_IRQHandler
147         PUBWEAK I2C1_IRQHandler
148         PUBWEAK I2C2_IRQHandler
149 ;SPIFI_IRQHandler ;not used
150         PUBWEAK SSP0_IRQHandler
151         PUBWEAK SSP1_IRQHandler
152         PUBWEAK PLL0_IRQHandler
153         PUBWEAK RTC_IRQHandler
154         PUBWEAK EINT0_IRQHandler
155         PUBWEAK EINT1_IRQHandler
156         PUBWEAK EINT2_IRQHandler
157         PUBWEAK EINT3_IRQHandler
158         PUBWEAK ADC_IRQHandler
159         PUBWEAK BOD_IRQHandler
160         PUBWEAK USB_IRQHandler
161         PUBWEAK CAN_IRQHandler
162         PUBWEAK DMA_IRQHandler
163         PUBWEAK I2S_IRQHandler
164         PUBWEAK ENET_IRQHandler
165         PUBWEAK MCI_IRQHandler
166         PUBWEAK MCPWM_IRQHandler
167         PUBWEAK QEI_IRQHandler
168         PUBWEAK PLL1_IRQHandler
169         PUBWEAK USBActivity_IRQHandler
170         PUBWEAK CANActivity_IRQHandler
171         PUBWEAK UART4_IRQHandler
172         PUBWEAK SSP2_IRQHandler
173         PUBWEAK LCD_IRQHandler
174         PUBWEAK GPIO_IRQHandler
175         PUBWEAK PWM0_IRQHandler
176         PUBWEAK EEPROM_IRQHandler
177         
178       SECTION .text:CODE:REORDER:NOROOT(1)
179       THUMB
180 NMI_Handler       
181 HardFault_Handler
182 MemManage_Handler 
183 BusFault_Handler
184 UsageFault_Handler
185 SVC_Handler
186 DebugMon_Handler
187 PendSV_Handler
188 SysTick_Handler
189 WDT_IRQHandler
190 TIMER0_IRQHandler
191 TIMER1_IRQHandler
192 TIMER2_IRQHandler
193 TIMER3_IRQHandler
194 UART0_IRQHandler
195 UART1_IRQHandler
196 UART2_IRQHandler
197 UART3_IRQHandler
198 PWM1_IRQHandler
199 I2C0_IRQHandler
200 I2C1_IRQHandler
201 I2C2_IRQHandler
202 ;SPIFI_IRQHandler ;not used
203 SSP0_IRQHandler
204 SSP1_IRQHandler
205 PLL0_IRQHandler
206 RTC_IRQHandler
207 EINT0_IRQHandler
208 EINT1_IRQHandler
209 EINT2_IRQHandler
210 EINT3_IRQHandler
211 ADC_IRQHandler
212 BOD_IRQHandler
213 USB_IRQHandler
214 CAN_IRQHandler
215 DMA_IRQHandler
216 I2S_IRQHandler
217 ENET_IRQHandler
218 MCI_IRQHandler
219 MCPWM_IRQHandler
220 QEI_IRQHandler
221 PLL1_IRQHandler
222 USBActivity_IRQHandler
223 CANActivity_IRQHandler
224 UART4_IRQHandler
225 SSP2_IRQHandler
226 LCD_IRQHandler
227 GPIO_IRQHandler
228 PWM0_IRQHandler
229 EEPROM_IRQHandler
230 Default_IRQHandler
231         B Default_IRQHandler
232
233         SECTION .crp:CODE:ROOT(2)
234         DATA
235 /* Code Read Protection
236 NO_ISP  0x4E697370 -  Prevents sampling of pin PIO0_1 for entering ISP mode
237 CRP1    0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
238                    - Copy RAM to flash command can not write to Sector 0.
239                    - Erase command can erase Sector 0 only when all sectors
240                      are selected for erase.
241                    - Compare command is disabled.
242                    - Read Memory command is disabled.
243 CRP2    0x87654321 - Read Memory is disabled.
244                    - Write to RAM is disabled.
245                    - "Go" command is disabled.
246                    - Copy RAM to flash is disabled.
247                    - Compare is disabled.
248 CRP3    0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
249                      by pulling PIO0_1 LOW is disabled if a valid user code is
250                      present in flash sector 0.
251 Caution: If CRP3 is selected, no future factory testing can be
252 performed on the device.
253 */
254             DCD 0xFFFFFFFF
255
256         END