1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
4 * $Date: 17. January 2013
7 * Project: CMSIS DSP Library
8 * Title: arm_shift_q7.c
10 * Description: Processing function for the Q7 Shifting
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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15 * modification, are permitted provided that the following conditions
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27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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39 * -------------------------------------------------------------------- */
54 * @brief Shifts the elements of a Q7 vector a specified number of bits.
55 * @param[in] *pSrc points to the input vector
56 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
57 * @param[out] *pDst points to the output vector
58 * @param[in] blockSize number of samples in the vector
61 * \par Conditions for optimum performance
62 * Input and output buffers should be aligned by 32-bit
65 * <b>Scaling and Overflow Behavior:</b>
67 * The function uses saturating arithmetic.
68 * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
77 uint32_t blkCnt; /* loop counter */
78 uint8_t sign; /* Sign of shiftBits */
80 #ifndef ARM_MATH_CM0_FAMILY
82 /* Run the below code for Cortex-M4 and Cortex-M3 */
83 q7_t in1; /* Input value1 */
84 q7_t in2; /* Input value2 */
85 q7_t in3; /* Input value3 */
86 q7_t in4; /* Input value4 */
90 blkCnt = blockSize >> 2u;
92 /* Getting the sign of shiftBits */
93 sign = (shiftBits & 0x80);
95 /* If the shift value is positive then do right shift else left shift */
98 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
99 ** a second loop below computes the remaining 1 to 3 samples. */
102 /* C = A << shiftBits */
109 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
110 *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
111 __SSAT((in2 << shiftBits), 8),
112 __SSAT((in3 << shiftBits), 8),
113 __SSAT((in4 << shiftBits), 8));
114 /* Update source pointer to process next sampels */
117 /* Decrement the loop counter */
121 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
122 ** No loop unrolling is used. */
123 blkCnt = blockSize % 0x4u;
127 /* C = A << shiftBits */
128 /* Shift the input and then store the result in the destination buffer. */
129 *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
131 /* Decrement the loop counter */
137 shiftBits = -shiftBits;
138 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
139 ** a second loop below computes the remaining 1 to 3 samples. */
142 /* C = A >> shiftBits */
149 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
150 *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
151 (in3 >> shiftBits), (in4 >> shiftBits));
156 /* Decrement the loop counter */
160 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
161 ** No loop unrolling is used. */
162 blkCnt = blockSize % 0x4u;
166 /* C = A >> shiftBits */
167 /* Shift the input and then store the result in the destination buffer. */
169 *pDst++ = (in1 >> shiftBits);
171 /* Decrement the loop counter */
178 /* Run the below code for Cortex-M0 */
180 /* Getting the sign of shiftBits */
181 sign = (shiftBits & 0x80);
183 /* If the shift value is positive then do right shift else left shift */
186 /* Initialize blkCnt with number of samples */
191 /* C = A << shiftBits */
192 /* Shift the input and then store the result in the destination buffer. */
193 *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
195 /* Decrement the loop counter */
201 /* Initialize blkCnt with number of samples */
206 /* C = A >> shiftBits */
207 /* Shift the input and then store the result in the destination buffer. */
208 *pDst++ = (*pSrc++ >> -shiftBits);
210 /* Decrement the loop counter */
215 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
219 * @} end of shift group