tmk_core/protocol/arm_atsam/issi3733_driver.h

   1 /*
   2 Copyright 2018 Massdrop Inc.
   3
   4 This program is free software: you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation, either version 2 of the License, or
   7 (at your option) any later version.
   8
   9 This program is distributed in the hope that it will be useful,
  10 but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 GNU General Public License for more details.
  13
  14 You should have received a copy of the GNU General Public License
  15 along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18 #ifndef _ISSI3733_DRIVER_H_
  19 #define _ISSI3733_DRIVER_H_
  20
  21 //ISII3733 Registers
  22
  23 #define ISSI3733_CMDR 0xFD                      //Command Register (Write Only)
  24
  25 #define ISSI3733_CMDRWL 0xFE                    //Command Register Write Lock (Read/Write)
  26 #define ISSI3733_CMDRWL_WRITE_DISABLE 0x00      //Lock register
  27 #define ISSI3733_CMDRWL_WRITE_ENABLE_ONCE 0xC5  //Enable one write to register then reset to locked
  28
  29 #define ISSI3733_IMR 0xF0                       //Interrupt Mask Register (Write Only)
  30 #define ISSI3733_IMR_IAC_ON 0x08                //Auto Clear Interrupt Bit - Interrupt auto clear when INTB stay low exceeds 8ms
  31 #define ISSI3733_IMR_IAB_ON 0x04                //Auto Breath Interrupt Bit - Enable auto breath loop finish interrupt
  32 #define ISSI3733_IMR_IS_ON 0x02                 //Dot Short Interrupt Bit - Enable dot short interrupt
  33 #define ISSI3733_IMR_IO_ON 0x01                 //Dot Open Interrupt Bit - Enable dot open interrupt
  34
  35 #define ISSI3733_ISR 0xF1                       //Interrupt Status Register (Read Only)
  36 #define ISSI3733_ISR_ABM3_FINISH 0x10           //Auto Breath Mode 3 Finish Bit - ABM3 finished
  37 #define ISSI3733_ISR_ABM2_FINISH 0x08           //Auto Breath Mode 2 Finish Bit - ABM2 finished
  38 #define ISSI3733_ISR_ABM1_FINISH 0x04           //Auto Breath Mode 1 Finish Bit - ABM1 finished
  39 #define ISSI3733_ISR_SB 0x02                    //Short Bit - Shorted
  40 #define ISSI3733_ISR_OB 0x01                    //Open Bit - Opened
  41
  42 #define ISSI3733_PG0 0x00                       //LED Control Register
  43 #define ISSI3733_PG1 0x01                       //PWM Register
  44 #define ISSI3733_PG2 0x02                       //Auto Breath Mode Register
  45 #define ISSI3733_PG3 0x03                       //Function Register
  46
  47 #define ISSI3733_PG_ONOFF ISSI3733_PG0
  48 #define ISSI3733_PG_OR ISSI3733_PG0
  49 #define ISSI3733_PG_SR ISSI3733_PG0
  50 #define ISSI3733_PG_PWM ISSI3733_PG1
  51 #define ISSI3733_PG_ABM ISSI3733_PG2
  52 #define ISSI3733_PG_FN ISSI3733_PG3
  53
  54 #define ISSI3733_CR 0x00                        //Configuration Register
  55
  56 //PG3: Configuration Register: Synchronize Configuration
  57 #define ISSI3733_CR_SYNC_MASTER 0x40            //Master
  58 #define ISSI3733_CR_SYNC_SLAVE 0x80             //Slave
  59 #define ISSI3733_CR_SYNC_HIGH_IMP 0xC0          //High Impedance
  60
  61 //PG3: Configuration Register: Open/Short Detection Enable Bit
  62 //#define ISSI3733_CR_OSD_DISABLE 0x00          //Disable open/short detection
  63 #define ISSI3733_CR_OSD_ENABLE 0x04             //Enable open/short detection
  64
  65 //PG3: Configuration Register: Auto Breath Enable
  66 //#define ISSI3733_CR_B_EN_PWM 0x00             //PWM Mode Enable
  67 #define ISSI3733_CR_B_EN_AUTO 0x02              //Auto Breath Mode Enable
  68
  69 //PG3: Configuration Register: Software Shutdown Control
  70 //#define ISSI3733_CR_SSD_SHUTDOWN 0x00         //Software shutdown
  71 #define ISSI3733_CR_SSD_NORMAL 0x01             //Normal operation
  72
  73 #define ISSI3733_GCCR 0x01              //Global Current Control Register
  74
  75 //1 Byte, Iout = (GCC / 256) * (840 / Rext)
  76 //TODO: Give user define for Rext
  77
  78 //PG3: Auto Breath Control Register 1
  79 #define ISSI3733_ABCR1_ABM1 0x02        //Auto Breath Control Register 1 of ABM-1
  80 #define ISSI3733_ABCR1_ABM2 0x06        //Auto Breath Control Register 1 of ABM-2
  81 #define ISSI3733_ABCR1_ABM3 0x0A        //Auto Breath Control Register 1 of ABM-3
  82
  83 //Rise time
  84 #define ISSI3733_ABCR1_T1_0021 0x00     //0.21s
  85 #define ISSI3733_ABCR1_T1_0042 0x20     //0.42s
  86 #define ISSI3733_ABCR1_T1_0084 0x40     //0.84s
  87 #define ISSI3733_ABCR1_T1_0168 0x60     //1.68s
  88 #define ISSI3733_ABCR1_T1_0336 0x80     //3.36s
  89 #define ISSI3733_ABCR1_T1_0672 0xA0     //6.72s
  90 #define ISSI3733_ABCR1_T1_1344 0xC0     //13.44s
  91 #define ISSI3733_ABCR1_T1_2688 0xE0     //26.88s
  92
  93 //Max value time
  94 #define ISSI3733_ABCR1_T2_0000 0x00     //0s
  95 #define ISSI3733_ABCR1_T2_0021 0x02     //0.21s
  96 #define ISSI3733_ABCR1_T2_0042 0x04     //0.42s
  97 #define ISSI3733_ABCR1_T2_0084 0x06     //0.84s
  98 #define ISSI3733_ABCR1_T2_0168 0x08     //1.68s
  99 #define ISSI3733_ABCR1_T2_0336 0x0A     //3.36s
 100 #define ISSI3733_ABCR1_T2_0672 0x0C     //6.72s
 101 #define ISSI3733_ABCR1_T2_1344 0x0E     //13.44s
 102 #define ISSI3733_ABCR1_T2_2688 0x10     //26.88s
 103
 104 //PG3: Auto Breath Control Register 2
 105 #define ISSI3733_ABCR2_ABM1 0x03        //Auto Breath Control Register 2 of ABM-1
 106 #define ISSI3733_ABCR2_ABM2 0x07        //Auto Breath Control Register 2 of ABM-2
 107 #define ISSI3733_ABCR2_ABM3 0x0B        //Auto Breath Control Register 2 of ABM-3
 108
 109 //Fall time
 110 #define ISSI3733_ABCR2_T3_0021 0x00     //0.21s
 111 #define ISSI3733_ABCR2_T3_0042 0x20     //0.42s
 112 #define ISSI3733_ABCR2_T3_0084 0x40     //0.84s
 113 #define ISSI3733_ABCR2_T3_0168 0x60     //1.68s
 114 #define ISSI3733_ABCR2_T3_0336 0x80     //3.36s
 115 #define ISSI3733_ABCR2_T3_0672 0xA0     //6.72s
 116 #define ISSI3733_ABCR2_T3_1344 0xC0     //13.44s
 117 #define ISSI3733_ABCR2_T3_2688 0xE0     //26.88s
 118
 119 //Min value time
 120 #define ISSI3733_ABCR2_T4_0000 0x00     //0s
 121 #define ISSI3733_ABCR2_T4_0021 0x02     //0.21s
 122 #define ISSI3733_ABCR2_T4_0042 0x04     //0.42s
 123 #define ISSI3733_ABCR2_T4_0084 0x06     //0.84s
 124 #define ISSI3733_ABCR2_T4_0168 0x08     //1.68s
 125 #define ISSI3733_ABCR2_T4_0336 0x0A     //3.36s
 126 #define ISSI3733_ABCR2_T4_0672 0x0C     //6.72s
 127 #define ISSI3733_ABCR2_T4_1344 0x0E     //13.44s
 128 #define ISSI3733_ABCR2_T4_2688 0x10     //26.88s
 129 #define ISSI3733_ABCR2_T4_5376 0x12     //53.76s
 130 #define ISSI3733_ABCR2_T4_10752 0x14    //107.52s
 131
 132 //PG3: Auto Breath Control Register 3
 133 #define ISSI3733_ABCR3_ABM1 0x04        //Auto Breath Control Register 3 of ABM-1
 134 #define ISSI3733_ABCR3_ABM2 0x08        //Auto Breath Control Register 3 of ABM-2
 135 #define ISSI3733_ABCR3_ABM3 0x0C        //Auto Breath Control Register 3 of ABM-3
 136
 137 #define ISSI3733_ABCR3_LTA_LOOP_ENDLESS 0x00
 138 #define ISSI3733_ABCR3_LTA_LOOP_1 0x01
 139 #define ISSI3733_ABCR3_LTA_LOOP_2 0x02
 140 #define ISSI3733_ABCR3_LTA_LOOP_3 0x03
 141 #define ISSI3733_ABCR3_LTA_LOOP_4 0x04
 142 #define ISSI3733_ABCR3_LTA_LOOP_5 0x05
 143 #define ISSI3733_ABCR3_LTA_LOOP_6 0x06
 144 #define ISSI3733_ABCR3_LTA_LOOP_7 0x07
 145 #define ISSI3733_ABCR3_LTA_LOOP_8 0x08
 146 #define ISSI3733_ABCR3_LTA_LOOP_9 0x09
 147 #define ISSI3733_ABCR3_LTA_LOOP_10 0x0A
 148 #define ISSI3733_ABCR3_LTA_LOOP_11 0x0B
 149 #define ISSI3733_ABCR3_LTA_LOOP_12 0x0C
 150 #define ISSI3733_ABCR3_LTA_LOOP_13 0x0D
 151 #define ISSI3733_ABCR3_LTA_LOOP_14 0x0E
 152 #define ISSI3733_ABCR3_LTA_LOOP_15 0x0F
 153
 154 //Loop Begin
 155 #define ISSI3733_ABCR3_LB_T1 0x00
 156 #define ISSI3733_ABCR3_LB_T2 0x10
 157 #define ISSI3733_ABCR3_LB_T3 0x20
 158 #define ISSI3733_ABCR3_LB_T4 0x30
 159
 160 //Loop End
 161 #define ISSI3733_ABCR3_LE_T3 0x00       //End at Off state
 162 #define ISSI3733_ABCR3_LE_T1 0x40       //End at On State
 163
 164 //PG3: Auto Breath Control Register 4
 165 #define ISSI3733_ABCR4_ABM1 0x05        //Auto Breath Control Register 4 of ABM-1
 166 #define ISSI3733_ABCR4_ABM2 0x09        //Auto Breath Control Register 4 of ABM-2
 167 #define ISSI3733_ABCR4_ABM3 0x0D        //Auto Breath Control Register 4 of ABM-3
 168
 169 #define ISSI3733_ABCR4_LTB_LOOP_ENDLESS 0x00
 170 //Or 8bit loop times
 171
 172 //PG3: Time Update Register
 173 #define ISSI3733_TUR 0x0E
 174 #define ISSI3733_TUR_UPDATE 0x00        //Write to update 02h~0Dh time registers after configuring
 175
 176 //PG3: SWy Pull-Up Resistor Selection Register
 177 #define ISSI3733_SWYR_PUR 0x0F
 178 #define ISSI3733_SWYR_PUR_NONE 0x00     //No pull-up resistor
 179 #define ISSI3733_SWYR_PUR_500 0x01      //0.5k Ohm
 180 #define ISSI3733_SWYR_PUR_1000 0x02     //1.0k Ohm
 181 #define ISSI3733_SWYR_PUR_2000 0x03     //2.0k Ohm
 182 #define ISSI3733_SWYR_PUR_4000 0x04     //4.0k Ohm
 183 #define ISSI3733_SWYR_PUR_8000 0x05     //8.0k Ohm
 184 #define ISSI3733_SWYR_PUR_16000 0x06    //16k Ohm
 185 #define ISSI3733_SWYR_PUR_32000 0x07    //32k Ohm
 186
 187 //PG3: CSx Pull-Down Resistor Selection Register
 188 #define ISSI3733_CSXR_PDR 0x10
 189 #define ISSI3733_CSXR_PDR_NONE 0x00     //No pull-down resistor
 190 #define ISSI3733_CSXR_PDR_500 0x01      //0.5k Ohm
 191 #define ISSI3733_CSXR_PDR_1000 0x02     //1.0k Ohm
 192 #define ISSI3733_CSXR_PDR_2000 0x03     //2.0k Ohm
 193 #define ISSI3733_CSXR_PDR_4000 0x04     //4.0k Ohm
 194 #define ISSI3733_CSXR_PDR_8000 0x05     //8.0k Ohm
 195 #define ISSI3733_CSXR_PDR_16000 0x06    //16k Ohm
 196 #define ISSI3733_CSXR_PDR_32000 0x07    //32k Ohm
 197
 198 //PG3: Reset Register
 199 #define ISSI3733_RR 0x11                //Read to reset all registers to default values
 200
 201 #endif //_ISSI3733_DRIVER_H_