2 * WARNING: be careful changing this code, it is very timing dependent
11 #define F_CPU 16000000
15 #include <avr/interrupt.h>
16 #include <util/delay.h>
20 //#include <pro_micro.h>
22 #ifdef SOFT_SERIAL_PIN
24 #ifdef __AVR_ATmega32U4__
25 // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
27 #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
28 #error Using ATmega32U4 I2C, so can not use PD0, PD1
32 #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
33 #define SERIAL_PIN_DDR DDRD
34 #define SERIAL_PIN_PORT PORTD
35 #define SERIAL_PIN_INPUT PIND
36 #if SOFT_SERIAL_PIN == D0
37 #define SERIAL_PIN_MASK _BV(PD0)
38 #define EIMSK_BIT _BV(INT0)
39 #define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
40 #define SERIAL_PIN_INTERRUPT INT0_vect
41 #elif SOFT_SERIAL_PIN == D1
42 #define SERIAL_PIN_MASK _BV(PD1)
43 #define EIMSK_BIT _BV(INT1)
44 #define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
45 #define SERIAL_PIN_INTERRUPT INT1_vect
46 #elif SOFT_SERIAL_PIN == D2
47 #define SERIAL_PIN_MASK _BV(PD2)
48 #define EIMSK_BIT _BV(INT2)
49 #define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
50 #define SERIAL_PIN_INTERRUPT INT2_vect
51 #elif SOFT_SERIAL_PIN == D3
52 #define SERIAL_PIN_MASK _BV(PD3)
53 #define EIMSK_BIT _BV(INT3)
54 #define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
55 #define SERIAL_PIN_INTERRUPT INT3_vect
57 #elif SOFT_SERIAL_PIN == E6
58 #define SERIAL_PIN_DDR DDRE
59 #define SERIAL_PIN_PORT PORTE
60 #define SERIAL_PIN_INPUT PINE
61 #define SERIAL_PIN_MASK _BV(PE6)
62 #define EIMSK_BIT _BV(INT6)
63 #define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
64 #define SERIAL_PIN_INTERRUPT INT6_vect
66 #error invalid SOFT_SERIAL_PIN value
70 #error serial.c now support ATmega32U4 only
73 //////////////// for backward compatibility ////////////////////////////////
74 #ifndef SERIAL_USE_MULTI_TRANSACTION
75 /* --- USE Simple API (OLD API, compatible with let's split serial.c) */
76 #if SERIAL_SLAVE_BUFFER_LENGTH > 0
77 uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
79 #if SERIAL_MASTER_BUFFER_LENGTH > 0
80 uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0};
82 uint8_t volatile status0 = 0;
84 SSTD_t transactions[] = {
85 { (uint8_t *)&status0,
86 #if SERIAL_MASTER_BUFFER_LENGTH > 0
87 sizeof(serial_master_buffer), (uint8_t *)serial_master_buffer,
91 #if SERIAL_SLAVE_BUFFER_LENGTH > 0
92 sizeof(serial_slave_buffer), (uint8_t *)serial_slave_buffer
99 void serial_master_init(void)
100 { soft_serial_initiator_init(transactions, TID_LIMIT(transactions)); }
102 void serial_slave_init(void)
103 { soft_serial_target_init(transactions, TID_LIMIT(transactions)); }
106 // 1 => slave did not respond
107 // 2 => checksum error
108 int serial_update_buffers()
111 result = soft_serial_transaction();
115 #endif // end of Simple API (OLD API, compatible with let's split serial.c)
116 ////////////////////////////////////////////////////////////////////////////
118 #define ALWAYS_INLINE __attribute__((always_inline))
119 #define NO_INLINE __attribute__((noinline))
120 #define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
124 #define EVEN_PARITY 0
125 #define PARITY EVEN_PARITY
128 // custom setup in config.h
129 // #define TID_SEND_ADJUST 2
130 // #define SERIAL_DELAY 6 // micro sec
131 // #define READ_WRITE_START_ADJUST 30 // cycles
132 // #define READ_WRITE_WIDTH_ADJUST 8 // cycles
134 // ============ Standard setups ============
136 #ifndef SELECT_SOFT_SERIAL_SPEED
137 #define SELECT_SOFT_SERIAL_SPEED 1
139 // 1: about 137kbps (default)
147 #define TID_SEND_ADJUST 14
149 #define TID_SEND_ADJUST 2
152 #if SELECT_SOFT_SERIAL_SPEED == 0
154 #define SERIAL_DELAY 4 // micro sec
156 #define READ_WRITE_START_ADJUST 33 // cycles
157 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
159 #define READ_WRITE_START_ADJUST 34 // cycles
160 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
162 #elif SELECT_SOFT_SERIAL_SPEED == 1
164 #define SERIAL_DELAY 6 // micro sec
166 #define READ_WRITE_START_ADJUST 30 // cycles
167 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
169 #define READ_WRITE_START_ADJUST 33 // cycles
170 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
172 #elif SELECT_SOFT_SERIAL_SPEED == 2
174 #define SERIAL_DELAY 12 // micro sec
175 #define READ_WRITE_START_ADJUST 30 // cycles
177 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
179 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
181 #elif SELECT_SOFT_SERIAL_SPEED == 3
183 #define SERIAL_DELAY 24 // micro sec
184 #define READ_WRITE_START_ADJUST 30 // cycles
186 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
188 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
190 #elif SELECT_SOFT_SERIAL_SPEED == 4
192 #define SERIAL_DELAY 36 // micro sec
193 #define READ_WRITE_START_ADJUST 30 // cycles
195 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
197 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
199 #elif SELECT_SOFT_SERIAL_SPEED == 5
201 #define SERIAL_DELAY 48 // micro sec
202 #define READ_WRITE_START_ADJUST 30 // cycles
204 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
206 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
209 #error invalid SELECT_SOFT_SERIAL_SPEED value
210 #endif /* SELECT_SOFT_SERIAL_SPEED */
211 #endif /* SERIAL_DELAY */
213 #define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
214 #define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
216 #define SLAVE_INT_WIDTH_US 1
217 #ifndef SERIAL_USE_MULTI_TRANSACTION
218 #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
220 #define SLAVE_INT_ACK_WIDTH_UNIT 2
221 #define SLAVE_INT_ACK_WIDTH 4
224 static SSTD_t *Transaction_table = NULL;
225 static uint8_t Transaction_table_size = 0;
227 inline static void serial_delay(void) ALWAYS_INLINE;
229 void serial_delay(void) {
230 _delay_us(SERIAL_DELAY);
233 inline static void serial_delay_half1(void) ALWAYS_INLINE;
235 void serial_delay_half1(void) {
236 _delay_us(SERIAL_DELAY_HALF1);
239 inline static void serial_delay_half2(void) ALWAYS_INLINE;
241 void serial_delay_half2(void) {
242 _delay_us(SERIAL_DELAY_HALF2);
245 inline static void serial_output(void) ALWAYS_INLINE;
247 void serial_output(void) {
248 SERIAL_PIN_DDR |= SERIAL_PIN_MASK;
251 // make the serial pin an input with pull-up resistor
252 inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
254 void serial_input_with_pullup(void) {
255 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK;
256 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
259 inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
261 uint8_t serial_read_pin(void) {
262 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
265 inline static void serial_low(void) ALWAYS_INLINE;
267 void serial_low(void) {
268 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK;
271 inline static void serial_high(void) ALWAYS_INLINE;
273 void serial_high(void) {
274 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
277 void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
279 Transaction_table = sstd_table;
280 Transaction_table_size = (uint8_t)sstd_table_size;
285 void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
287 Transaction_table = sstd_table;
288 Transaction_table_size = (uint8_t)sstd_table_size;
289 serial_input_with_pullup();
291 // Enable INT0-INT3,INT6
293 #if SERIAL_PIN_MASK == _BV(PE6)
294 // Trigger on falling edge of INT6
297 // Trigger on falling edge of INT0-INT3
302 // Used by the sender to synchronize timing with the reciver.
303 static void sync_recv(void) NO_INLINE;
305 void sync_recv(void) {
306 for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) {
308 // This shouldn't hang if the target disconnects because the
309 // serial line will float to high if the target does disconnect.
310 while (!serial_read_pin());
313 // Used by the reciver to send a synchronization signal to the sender.
314 static void sync_send(void) NO_INLINE;
316 void sync_send(void) {
322 // Reads a byte from the serial line
323 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
324 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
325 uint8_t byte, i, p, pb;
327 _delay_sub_us(READ_WRITE_START_ADJUST);
328 for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
329 serial_delay_half1(); // read the middle of pulses
330 if( serial_read_pin() ) {
331 byte = (byte << 1) | 1; p ^= 1;
333 byte = (byte << 1) | 0; p ^= 0;
335 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
336 serial_delay_half2();
338 /* recive parity bit */
339 serial_delay_half1(); // read the middle of pulses
340 pb = serial_read_pin();
341 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
342 serial_delay_half2();
344 *pterrcount += (p != pb)? 1 : 0;
349 // Sends a byte with MSB ordering
350 void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
351 void serial_write_chunk(uint8_t data, uint8_t bit) {
353 for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
355 serial_high(); p ^= 1;
357 serial_low(); p ^= 0;
361 /* send parity bit */
362 if(p & 1) { serial_high(); }
363 else { serial_low(); }
366 serial_low(); // sync_send() / senc_recv() need raise edge
369 static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
371 void serial_send_packet(uint8_t *buffer, uint8_t size) {
372 for (uint8_t i = 0; i < size; ++i) {
376 serial_write_chunk(data,8);
380 static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
382 uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
384 for (uint8_t i = 0; i < size; ++i) {
387 data = serial_read_chunk(&pecount, 8);
394 void change_sender2reciver(void) {
396 serial_delay_half1(); //1
398 serial_input_with_pullup(); //2
399 serial_delay_half1(); //3
403 void change_reciver2sender(void) {
408 serial_delay_half1(); //4
411 static inline uint8_t nibble_bits_count(uint8_t bits)
413 bits = (bits & 0x5) + (bits >> 1 & 0x5);
414 bits = (bits & 0x3) + (bits >> 2 & 0x3);
418 // interrupt handle to be used by the target device
419 ISR(SERIAL_PIN_INTERRUPT) {
421 #ifndef SERIAL_USE_MULTI_TRANSACTION
424 SSTD_t *trans = Transaction_table;
426 // recive transaction table index
430 bits = serial_read_chunk(&pecount,7);
432 bits = (bits&7) != nibble_bits_count(tid);
433 if( bits || pecount> 0 || tid > Transaction_table_size ) {
436 serial_delay_half1();
438 serial_high(); // response step1 low->high
440 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH);
441 SSTD_t *trans = &Transaction_table[tid];
442 serial_low(); // response step2 ack high->low
446 if( trans->target2initiator_buffer_size > 0 )
447 serial_send_packet((uint8_t *)trans->target2initiator_buffer,
448 trans->target2initiator_buffer_size);
449 // target switch to input
450 change_sender2reciver();
452 // target recive phase
453 if( trans->initiator2target_buffer_size > 0 ) {
454 if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
455 trans->initiator2target_buffer_size) ) {
456 *trans->status = TRANSACTION_ACCEPTED;
458 *trans->status = TRANSACTION_DATA_ERROR;
461 *trans->status = TRANSACTION_ACCEPTED;
464 sync_recv(); //weit initiator output to high
468 // start transaction by initiator
470 // int soft_serial_transaction(int sstd_index)
474 // TRANSACTION_NO_RESPONSE
475 // TRANSACTION_DATA_ERROR
476 // this code is very time dependent, so we need to disable interrupts
477 #ifndef SERIAL_USE_MULTI_TRANSACTION
478 int soft_serial_transaction(void) {
479 SSTD_t *trans = Transaction_table;
481 int soft_serial_transaction(int sstd_index) {
482 if( sstd_index > Transaction_table_size )
483 return TRANSACTION_TYPE_ERROR;
484 SSTD_t *trans = &Transaction_table[sstd_index];
488 // signal to the target that we want to start a transaction
491 _delay_us(SLAVE_INT_WIDTH_US);
493 #ifndef SERIAL_USE_MULTI_TRANSACTION
494 // wait for the target response
495 serial_input_with_pullup();
496 _delay_us(SLAVE_INT_RESPONSE_TIME);
498 // check if the target is present
499 if (serial_read_pin()) {
500 // target failed to pull the line low, assume not present
503 *trans->status = TRANSACTION_NO_RESPONSE;
505 return TRANSACTION_NO_RESPONSE;
509 // send transaction table index
510 int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
512 _delay_sub_us(TID_SEND_ADJUST);
513 serial_write_chunk(tid, 7);
514 serial_delay_half1();
516 // wait for the target response (step1 low->high)
517 serial_input_with_pullup();
518 while( !serial_read_pin() ) {
522 // check if the target is present (step2 high->low)
523 for( int i = 0; serial_read_pin(); i++ ) {
524 if (i > SLAVE_INT_ACK_WIDTH + 1) {
525 // slave failed to pull the line low, assume not present
528 *trans->status = TRANSACTION_NO_RESPONSE;
530 return TRANSACTION_NO_RESPONSE;
532 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
536 // initiator recive phase
537 // if the target is present syncronize with it
538 if( trans->target2initiator_buffer_size > 0 ) {
539 if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
540 trans->target2initiator_buffer_size) ) {
543 *trans->status = TRANSACTION_DATA_ERROR;
545 return TRANSACTION_DATA_ERROR;
549 // initiator switch to output
550 change_reciver2sender();
552 // initiator send phase
553 if( trans->initiator2target_buffer_size > 0 ) {
554 serial_send_packet((uint8_t *)trans->initiator2target_buffer,
555 trans->initiator2target_buffer_size);
558 // always, release the line when not in use
561 *trans->status = TRANSACTION_END;
563 return TRANSACTION_END;
566 #ifdef SERIAL_USE_MULTI_TRANSACTION
567 int soft_serial_get_and_clean_status(int sstd_index) {
568 SSTD_t *trans = &Transaction_table[sstd_index];
570 int retval = *trans->status;
579 // Helix serial.c history
580 // 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
581 // 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
582 // (adjusted with avr-gcc 4.9.2)
583 // 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
584 // (adjusted with avr-gcc 4.9.2)
585 // 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
586 // (adjusted with avr-gcc 4.9.2)
587 // 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
588 // (adjusted with avr-gcc 7.3.0)
589 // 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
590 // (adjusted with avr-gcc 5.4.0, 7.3.0)