2 * WARNING: be careful changing this code, it is very timing dependent
11 #define F_CPU 16000000
15 #include <avr/interrupt.h>
16 #include <util/delay.h>
20 //#include <pro_micro.h>
22 #ifdef SOFT_SERIAL_PIN
24 #ifdef __AVR_ATmega32U4__
25 // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
27 #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
28 #error Using ATmega32U4 I2C, so can not use PD0, PD1
32 #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
33 #define SERIAL_PIN_DDR DDRD
34 #define SERIAL_PIN_PORT PORTD
35 #define SERIAL_PIN_INPUT PIND
36 #if SOFT_SERIAL_PIN == D0
37 #define SERIAL_PIN_MASK _BV(PD0)
38 #define EIMSK_BIT _BV(INT0)
39 #define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
40 #define SERIAL_PIN_INTERRUPT INT0_vect
41 #elif SOFT_SERIAL_PIN == D1
42 #define SERIAL_PIN_MASK _BV(PD1)
43 #define EIMSK_BIT _BV(INT1)
44 #define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
45 #define SERIAL_PIN_INTERRUPT INT1_vect
46 #elif SOFT_SERIAL_PIN == D2
47 #define SERIAL_PIN_MASK _BV(PD2)
48 #define EIMSK_BIT _BV(INT2)
49 #define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
50 #define SERIAL_PIN_INTERRUPT INT2_vect
51 #elif SOFT_SERIAL_PIN == D3
52 #define SERIAL_PIN_MASK _BV(PD3)
53 #define EIMSK_BIT _BV(INT3)
54 #define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
55 #define SERIAL_PIN_INTERRUPT INT3_vect
57 #elif SOFT_SERIAL_PIN == E6
58 #define SERIAL_PIN_DDR DDRE
59 #define SERIAL_PIN_PORT PORTE
60 #define SERIAL_PIN_INPUT PINE
61 #define SERIAL_PIN_MASK _BV(PE6)
62 #define EIMSK_BIT _BV(INT6)
63 #define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
64 #define SERIAL_PIN_INTERRUPT INT6_vect
66 #error invalid SOFT_SERIAL_PIN value
70 #error serial.c now support ATmega32U4 only
73 #define ALWAYS_INLINE __attribute__((always_inline))
74 #define NO_INLINE __attribute__((noinline))
75 #define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
80 #define PARITY EVEN_PARITY
83 // custom setup in config.h
84 // #define TID_SEND_ADJUST 2
85 // #define SERIAL_DELAY 6 // micro sec
86 // #define READ_WRITE_START_ADJUST 30 // cycles
87 // #define READ_WRITE_WIDTH_ADJUST 8 // cycles
89 // ============ Standard setups ============
91 #ifndef SELECT_SOFT_SERIAL_SPEED
92 #define SELECT_SOFT_SERIAL_SPEED 1
93 // 0: about 189kbps (Experimental only)
94 // 1: about 137kbps (default)
102 #define TID_SEND_ADJUST 14
104 #define TID_SEND_ADJUST 2
107 #if SELECT_SOFT_SERIAL_SPEED == 0
109 #define SERIAL_DELAY 4 // micro sec
111 #define READ_WRITE_START_ADJUST 33 // cycles
112 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
114 #define READ_WRITE_START_ADJUST 34 // cycles
115 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
117 #elif SELECT_SOFT_SERIAL_SPEED == 1
119 #define SERIAL_DELAY 6 // micro sec
121 #define READ_WRITE_START_ADJUST 30 // cycles
122 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
124 #define READ_WRITE_START_ADJUST 33 // cycles
125 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
127 #elif SELECT_SOFT_SERIAL_SPEED == 2
129 #define SERIAL_DELAY 12 // micro sec
130 #define READ_WRITE_START_ADJUST 30 // cycles
132 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
134 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
136 #elif SELECT_SOFT_SERIAL_SPEED == 3
138 #define SERIAL_DELAY 24 // micro sec
139 #define READ_WRITE_START_ADJUST 30 // cycles
141 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
143 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
145 #elif SELECT_SOFT_SERIAL_SPEED == 4
147 #define SERIAL_DELAY 36 // micro sec
148 #define READ_WRITE_START_ADJUST 30 // cycles
150 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
152 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
154 #elif SELECT_SOFT_SERIAL_SPEED == 5
156 #define SERIAL_DELAY 48 // micro sec
157 #define READ_WRITE_START_ADJUST 30 // cycles
159 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
161 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
164 #error invalid SELECT_SOFT_SERIAL_SPEED value
165 #endif /* SELECT_SOFT_SERIAL_SPEED */
166 #endif /* SERIAL_DELAY */
168 #define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
169 #define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
171 #define SLAVE_INT_WIDTH_US 1
172 #ifndef SERIAL_USE_MULTI_TRANSACTION
173 #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
175 #define SLAVE_INT_ACK_WIDTH_UNIT 2
176 #define SLAVE_INT_ACK_WIDTH 4
179 static SSTD_t *Transaction_table = NULL;
180 static uint8_t Transaction_table_size = 0;
182 inline static void serial_delay(void) ALWAYS_INLINE;
184 void serial_delay(void) {
185 _delay_us(SERIAL_DELAY);
188 inline static void serial_delay_half1(void) ALWAYS_INLINE;
190 void serial_delay_half1(void) {
191 _delay_us(SERIAL_DELAY_HALF1);
194 inline static void serial_delay_half2(void) ALWAYS_INLINE;
196 void serial_delay_half2(void) {
197 _delay_us(SERIAL_DELAY_HALF2);
200 inline static void serial_output(void) ALWAYS_INLINE;
202 void serial_output(void) {
203 SERIAL_PIN_DDR |= SERIAL_PIN_MASK;
206 // make the serial pin an input with pull-up resistor
207 inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
209 void serial_input_with_pullup(void) {
210 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK;
211 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
214 inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
216 uint8_t serial_read_pin(void) {
217 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
220 inline static void serial_low(void) ALWAYS_INLINE;
222 void serial_low(void) {
223 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK;
226 inline static void serial_high(void) ALWAYS_INLINE;
228 void serial_high(void) {
229 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
232 void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
234 Transaction_table = sstd_table;
235 Transaction_table_size = (uint8_t)sstd_table_size;
240 void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
242 Transaction_table = sstd_table;
243 Transaction_table_size = (uint8_t)sstd_table_size;
244 serial_input_with_pullup();
246 // Enable INT0-INT3,INT6
248 #if SERIAL_PIN_MASK == _BV(PE6)
249 // Trigger on falling edge of INT6
252 // Trigger on falling edge of INT0-INT3
257 // Used by the sender to synchronize timing with the reciver.
258 static void sync_recv(void) NO_INLINE;
260 void sync_recv(void) {
261 for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) {
263 // This shouldn't hang if the target disconnects because the
264 // serial line will float to high if the target does disconnect.
265 while (!serial_read_pin());
268 // Used by the reciver to send a synchronization signal to the sender.
269 static void sync_send(void) NO_INLINE;
271 void sync_send(void) {
277 // Reads a byte from the serial line
278 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
279 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
280 uint8_t byte, i, p, pb;
282 _delay_sub_us(READ_WRITE_START_ADJUST);
283 for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
284 serial_delay_half1(); // read the middle of pulses
285 if( serial_read_pin() ) {
286 byte = (byte << 1) | 1; p ^= 1;
288 byte = (byte << 1) | 0; p ^= 0;
290 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
291 serial_delay_half2();
293 /* recive parity bit */
294 serial_delay_half1(); // read the middle of pulses
295 pb = serial_read_pin();
296 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
297 serial_delay_half2();
299 *pterrcount += (p != pb)? 1 : 0;
304 // Sends a byte with MSB ordering
305 void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
306 void serial_write_chunk(uint8_t data, uint8_t bit) {
308 for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
310 serial_high(); p ^= 1;
312 serial_low(); p ^= 0;
316 /* send parity bit */
317 if(p & 1) { serial_high(); }
318 else { serial_low(); }
321 serial_low(); // sync_send() / senc_recv() need raise edge
324 static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
326 void serial_send_packet(uint8_t *buffer, uint8_t size) {
327 for (uint8_t i = 0; i < size; ++i) {
331 serial_write_chunk(data,8);
335 static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
337 uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
339 for (uint8_t i = 0; i < size; ++i) {
342 data = serial_read_chunk(&pecount, 8);
349 void change_sender2reciver(void) {
351 serial_delay_half1(); //1
353 serial_input_with_pullup(); //2
354 serial_delay_half1(); //3
358 void change_reciver2sender(void) {
363 serial_delay_half1(); //4
366 static inline uint8_t nibble_bits_count(uint8_t bits)
368 bits = (bits & 0x5) + (bits >> 1 & 0x5);
369 bits = (bits & 0x3) + (bits >> 2 & 0x3);
373 // interrupt handle to be used by the target device
374 ISR(SERIAL_PIN_INTERRUPT) {
376 #ifndef SERIAL_USE_MULTI_TRANSACTION
379 SSTD_t *trans = Transaction_table;
381 // recive transaction table index
385 bits = serial_read_chunk(&pecount,7);
387 bits = (bits&7) != nibble_bits_count(tid);
388 if( bits || pecount> 0 || tid > Transaction_table_size ) {
391 serial_delay_half1();
393 serial_high(); // response step1 low->high
395 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH);
396 SSTD_t *trans = &Transaction_table[tid];
397 serial_low(); // response step2 ack high->low
401 if( trans->target2initiator_buffer_size > 0 )
402 serial_send_packet((uint8_t *)trans->target2initiator_buffer,
403 trans->target2initiator_buffer_size);
404 // target switch to input
405 change_sender2reciver();
407 // target recive phase
408 if( trans->initiator2target_buffer_size > 0 ) {
409 if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
410 trans->initiator2target_buffer_size) ) {
411 *trans->status = TRANSACTION_ACCEPTED;
413 *trans->status = TRANSACTION_DATA_ERROR;
416 *trans->status = TRANSACTION_ACCEPTED;
419 sync_recv(); //weit initiator output to high
423 // start transaction by initiator
425 // int soft_serial_transaction(int sstd_index)
429 // TRANSACTION_NO_RESPONSE
430 // TRANSACTION_DATA_ERROR
431 // this code is very time dependent, so we need to disable interrupts
432 #ifndef SERIAL_USE_MULTI_TRANSACTION
433 int soft_serial_transaction(void) {
434 SSTD_t *trans = Transaction_table;
436 int soft_serial_transaction(int sstd_index) {
437 if( sstd_index > Transaction_table_size )
438 return TRANSACTION_TYPE_ERROR;
439 SSTD_t *trans = &Transaction_table[sstd_index];
443 // signal to the target that we want to start a transaction
446 _delay_us(SLAVE_INT_WIDTH_US);
448 #ifndef SERIAL_USE_MULTI_TRANSACTION
449 // wait for the target response
450 serial_input_with_pullup();
451 _delay_us(SLAVE_INT_RESPONSE_TIME);
453 // check if the target is present
454 if (serial_read_pin()) {
455 // target failed to pull the line low, assume not present
458 *trans->status = TRANSACTION_NO_RESPONSE;
460 return TRANSACTION_NO_RESPONSE;
464 // send transaction table index
465 int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
467 _delay_sub_us(TID_SEND_ADJUST);
468 serial_write_chunk(tid, 7);
469 serial_delay_half1();
471 // wait for the target response (step1 low->high)
472 serial_input_with_pullup();
473 while( !serial_read_pin() ) {
477 // check if the target is present (step2 high->low)
478 for( int i = 0; serial_read_pin(); i++ ) {
479 if (i > SLAVE_INT_ACK_WIDTH + 1) {
480 // slave failed to pull the line low, assume not present
483 *trans->status = TRANSACTION_NO_RESPONSE;
485 return TRANSACTION_NO_RESPONSE;
487 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
491 // initiator recive phase
492 // if the target is present syncronize with it
493 if( trans->target2initiator_buffer_size > 0 ) {
494 if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
495 trans->target2initiator_buffer_size) ) {
498 *trans->status = TRANSACTION_DATA_ERROR;
500 return TRANSACTION_DATA_ERROR;
504 // initiator switch to output
505 change_reciver2sender();
507 // initiator send phase
508 if( trans->initiator2target_buffer_size > 0 ) {
509 serial_send_packet((uint8_t *)trans->initiator2target_buffer,
510 trans->initiator2target_buffer_size);
513 // always, release the line when not in use
516 *trans->status = TRANSACTION_END;
518 return TRANSACTION_END;
521 #ifdef SERIAL_USE_MULTI_TRANSACTION
522 int soft_serial_get_and_clean_status(int sstd_index) {
523 SSTD_t *trans = &Transaction_table[sstd_index];
525 int retval = *trans->status;
534 // Helix serial.c history
535 // 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
536 // 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
537 // (adjusted with avr-gcc 4.9.2)
538 // 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
539 // (adjusted with avr-gcc 4.9.2)
540 // 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
541 // (adjusted with avr-gcc 4.9.2)
542 // 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
543 // (adjusted with avr-gcc 7.3.0)
544 // 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
545 // (adjusted with avr-gcc 5.4.0, 7.3.0)
546 // 2018-12-17 copy to TOP/quantum/split_common/ and remove backward compatibility code (#4669)