5 #include <util/delay.h>
6 #include <avr/sfr_defs.h>
13 #define ISSI_ADDR_DEFAULT 0xE8
15 #define ISSI_REG_CONFIG 0x00
16 #define ISSI_REG_CONFIG_PICTUREMODE 0x00
17 #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
19 #define ISSI_CONF_PICTUREMODE 0x00
20 #define ISSI_CONF_AUTOFRAMEMODE 0x04
21 #define ISSI_CONF_AUDIOMODE 0x08
23 #define ISSI_REG_PICTUREFRAME 0x01
25 #define ISSI_REG_SHUTDOWN 0x0A
26 #define ISSI_REG_AUDIOSYNC 0x06
28 #define ISSI_COMMANDREGISTER 0xFD
29 #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
30 uint8_t control[8][9] = {
31 {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0, 0, 0, 0},
32 {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0, 0, 0, 0},
33 {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0, 0, 0, 0},
34 {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0, 0, 0, 0},
36 ISSIDeviceStruct *issi_devices[4] = {0, 0, 0, 0};
39 #define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
43 #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
47 #define F_SCL 400000UL // SCL frequency
49 #define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2)
51 uint8_t i2c_start(uint8_t address)
53 // reset TWI control register
55 // transmit START condition
56 TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
57 // wait for end of transmission
58 while( !(TWCR & (1<<TWINT)) );
60 // check if the start condition was successfully transmitted
61 if((TWSR & 0xF8) != TW_START){ return 1; }
63 // load slave address into data register
65 // start transmission of address
66 TWCR = (1<<TWINT) | (1<<TWEN);
67 // wait for end of transmission
68 while( !(TWCR & (1<<TWINT)) );
70 // check if the device has acknowledged the READ / WRITE mode
71 uint8_t twst = TW_STATUS & 0xF8;
72 if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1;
77 uint8_t i2c_write(uint8_t data)
79 // load data into data register
81 // start transmission of data
82 TWCR = (1 << TWINT) | (1 << TWEN);
83 // wait for end of transmission
84 while (!(TWCR & (1 << TWINT)))
87 if ((TWSR & 0xF8) != TW_MT_DATA_ACK) {
93 uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length)
95 TWBR = (uint8_t)TWBR_val;
96 if (i2c_start(address | I2C_WRITE))
98 for (uint16_t i = 0; i < length; i++) {
99 if (i2c_write(data[i]))
102 // transmit STOP condition
103 TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWSTO);
107 void setFrame(uint8_t device, uint8_t frame)
109 static uint8_t current_frame = -1;
110 if(current_frame != frame){
111 uint8_t payload[] = {
112 ISSI_ADDR_DEFAULT | device << 1,
113 ISSI_COMMANDREGISTER,
116 TWITransmitData(payload, sizeof(payload), 0, 1);
118 // static uint8_t current_frame = 0xFF;
119 // if(current_frame == frame){
122 // uint8_t payload[2] = { ISSI_COMMANDREGISTER, frame };
123 // i2c_transmit(ISSI_ADDR_DEFAULT | device << 1, payload, 2);
124 // current_frame = frame;
127 void writeRegister8(uint8_t device, uint8_t frame, uint8_t reg, uint8_t data)
130 setFrame(device, frame);
132 // Write to the register
133 uint8_t payload[] = {
134 ISSI_ADDR_DEFAULT | device << 1,
138 TWITransmitData(payload, sizeof(payload), 0, 1);
141 void activateLED(uint8_t matrix, uint8_t cx, uint8_t cy, uint8_t pwm)
143 uint8_t device_addr = (matrix & 0x06) >> 1;
144 ISSIDeviceStruct *device = issi_devices[device_addr];
148 // xprintf("activeLED: %02X %02X %02X %02X\n", matrix, cy, cx, pwm);
149 uint8_t x = cx - 1; // funciton takes 1 based counts, but we need 0...
150 uint8_t y = cy - 1; // creating them once for less confusion
151 uint8_t control_reg = (y << 1) | (matrix & 0x01);
153 cbi(device->led_ctrl[control_reg], x);
154 cbi(device->led_blink_ctrl[control_reg], x);
156 sbi(device->led_ctrl[control_reg], x);
157 sbi(device->led_blink_ctrl[control_reg], x);
160 switch(matrix & 0x01){
168 pwm_reg += (y << 4) + x;
169 device->led_pwm[pwm_reg] = pwm;
170 device->led_dirty = 1;
173 void update_issi(uint8_t device_addr, uint8_t blocking)
175 // This seems to take about 6ms
176 ISSIDeviceStruct *device = issi_devices[device_addr];
178 if(device->fn_dirty){
179 device->fn_dirty = 0;
180 setFrame(device_addr, ISSI_BANK_FUNCTIONREG);
181 TWITransmitData(&device->fn_device_addr, sizeof(device->fn_registers) + 2, 0, 1);
183 if(device->led_dirty){
184 device->led_dirty = 0;
185 setFrame(device_addr, 0);
186 TWITransmitData(&device->led_device_addr, 0xB6, 0, blocking);
194 for(uint8_t device_addr = 0; device_addr < 4; device_addr++){
195 // If this device has been previously allocated, free it
196 if(issi_devices[device_addr] != 0){
197 free(issi_devices[device_addr]);
199 // Try to shutdown the device, if this fails skip this device
200 writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, ISSI_REG_SHUTDOWN, 0x00);
201 while (!isTWIReady()){_delay_us(1);}
202 if(TWIInfo.errorCode != 0xFF){
203 xprintf("ISSI init failed %d %02X %02X\n", device_addr, TWIInfo.mode, TWIInfo.errorCode);
206 // Allocate the device structure - calloc zeros it for us
207 ISSIDeviceStruct *device = (ISSIDeviceStruct *)calloc(sizeof(ISSIDeviceStruct) * 2, 1);
208 issi_devices[device_addr] = device;
209 device->fn_device_addr = ISSI_ADDR_DEFAULT | device_addr << 1;
210 device->fn_register_addr = 0;
211 device->led_device_addr = ISSI_ADDR_DEFAULT | device_addr << 1;
212 device->led_register_addr = 0;
213 // set dirty bits so that all of the buffered data is written out
214 device->fn_dirty = 1;
215 device->led_dirty = 1;
216 update_issi(device_addr, 1);
217 // Set the function register to picture mode
218 // device->fn_reg[ISSI_REG_CONFIG] = ISSI_REG_CONFIG_PICTUREMODE;
219 writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, ISSI_REG_SHUTDOWN, 0x01);
222 // Shutdown and set all registers to 0
223 // writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, ISSI_REG_SHUTDOWN, 0x00);
224 // for(uint8_t bank = 0; bank <= 7; bank++){
225 // for (uint8_t reg = 0x00; reg <= 0xB3; reg++) {
226 // writeRegister8(device_addr, bank, reg, 0x00);
229 // for (uint8_t reg = 0; reg <= 0x0C; reg++) {
230 // writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, reg, 0x00);
232 // writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE);
233 // writeRegister8(device_addr, ISSI_BANK_FUNCTIONREG, ISSI_REG_SHUTDOWN, 0x01);
235 // writeRegister8(ISSI_BANK_FUNCTIONREG, 0x01, 0x01);
238 // writeRegister8(ISSI_BANK_FUNCTIONREG, 0x05, 0x48B);