1 /* Copyright 2018 ishtob
2 * Driver for DRV2605L written for QMK
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 uint8_t DRV2605L_transfer_buffer[20];
25 uint8_t DRV2605L_tx_register[0];
26 uint8_t DRV2605L_read_buffer[0];
27 uint8_t DRV2605L_read_register;
30 void DRV_write(uint8_t drv_register, uint8_t settings) {
31 DRV2605L_transfer_buffer[0] = drv_register;
32 DRV2605L_transfer_buffer[1] = settings;
33 i2c_transmit(DRV2605L_BASE_ADDRESS << 1, DRV2605L_transfer_buffer, 2, 100);
36 uint8_t DRV_read(uint8_t regaddress) {
37 DRV2605L_tx_register[0] = regaddress;
38 if (MSG_OK != i2c_transmit_receive(DRV2605L_BASE_ADDRESS << 1,
39 DRV2605L_tx_register, 1,
40 DRV2605L_read_buffer, 1
42 printf("err reading reg \n");
44 DRV2605L_read_register = (uint8_t)DRV2605L_read_buffer[0];
45 return DRV2605L_read_register;
51 i2c_start(DRV2605L_BASE_ADDRESS);
53 /* 0x07 sets DRV2605 into calibration mode */
54 DRV_write(DRV_MODE,0x07);
56 // DRV_write(DRV_FEEDBACK_CTRL,0xB6);
60 DRV_write(DRV_RATED_VOLT, (RATED_VOLTAGE/21.33)*1000);
61 #if ERM_OPEN_LOOP == 0
62 DRV_write(DRV_OVERDRIVE_CLAMP_VOLT, (((V_PEAK*(DRIVE_TIME+BLANKING_TIME+IDISS_TIME))/0.02133)/(DRIVE_TIME-0.0003)));
63 #elif ERM_OPEN_LOOP == 1
64 DRV_write(DRV_OVERDRIVE_CLAMP_VOLT, (V_PEAK/0.02196));
67 DRV_write(DRV_RATED_VOLT, ((V_RMS * sqrt(1 - ((4 * ((150+(SAMPLE_TIME*50))*0.000001)) + 0.0003)* F_LRA)/0.02071)));
68 #if LRA_OPEN_LOOP == 0
69 DRV_write(DRV_OVERDRIVE_CLAMP_VOLT, ((V_PEAK/sqrt(1-(F_LRA*0.0008))/0.02133)));
70 #elif LRA_OPEN_LOOP == 1
71 DRV_write(DRV_OVERDRIVE_CLAMP_VOLT, (V_PEAK/0.02196));
76 FB_SET.Bits.ERM_LRA = FB_ERM_LRA;
77 FB_SET.Bits.BRAKE_FACTOR = FB_BRAKEFACTOR;
78 FB_SET.Bits.LOOP_GAIN =FB_LOOPGAIN;
79 FB_SET.Bits.BEMF_GAIN = 0; /* auto-calibration populates this field*/
80 DRV_write(DRV_FEEDBACK_CTRL, (uint8_t) FB_SET.Byte);
82 C1_SET.Bits.C1_DRIVE_TIME = DRIVE_TIME;
83 C1_SET.Bits.C1_AC_COUPLE = AC_COUPLE;
84 C1_SET.Bits.C1_STARTUP_BOOST = STARTUP_BOOST;
85 DRV_write(DRV_CTRL_1, (uint8_t) C1_SET.Byte);
87 C2_SET.Bits.C2_BIDIR_INPUT = BIDIR_INPUT;
88 C2_SET.Bits.C2_BRAKE_STAB = BRAKE_STAB;
89 C2_SET.Bits.C2_SAMPLE_TIME = SAMPLE_TIME;
90 C2_SET.Bits.C2_BLANKING_TIME = BLANKING_TIME;
91 C2_SET.Bits.C2_IDISS_TIME = IDISS_TIME;
92 DRV_write(DRV_CTRL_2, (uint8_t) C2_SET.Byte);
94 C3_SET.Bits.C3_LRA_OPEN_LOOP = LRA_OPEN_LOOP;
95 C3_SET.Bits.C3_N_PWM_ANALOG = N_PWM_ANALOG;
96 C3_SET.Bits.C3_LRA_DRIVE_MODE = LRA_DRIVE_MODE;
97 C3_SET.Bits.C3_DATA_FORMAT_RTO = DATA_FORMAT_RTO;
98 C3_SET.Bits.C3_SUPPLY_COMP_DIS = SUPPLY_COMP_DIS;
99 C3_SET.Bits.C3_ERM_OPEN_LOOP = ERM_OPEN_LOOP;
100 C3_SET.Bits.C3_NG_THRESH = NG_THRESH;
101 DRV_write(DRV_CTRL_3, (uint8_t) C3_SET.Byte);
103 C4_SET.Bits.C4_ZC_DET_TIME = ZC_DET_TIME;
104 C4_SET.Bits.C4_AUTO_CAL_TIME = AUTO_CAL_TIME;
105 DRV_write(DRV_CTRL_4, (uint8_t) C4_SET.Byte);
106 DRV_write(DRV_LIB_SELECTION,LIB_SELECTION);
107 //start autocalibration
108 DRV_write(DRV_GO, 0x01);
110 /* 0x00 sets DRV2605 out of standby and to use internal trigger
111 * 0x01 sets DRV2605 out of standby and to use external trigger */
112 DRV_write(DRV_MODE,0x00);
114 /* 0x06: LRA library */
115 DRV_write(DRV_WAVEFORM_SEQ_1, 0x01);
117 /* 0xB9: LRA, 4x brake factor, medium gain, 7.5x back EMF
118 * 0x39: ERM, 4x brake factor, medium gain, 1.365x back EMF */
120 /* TODO: setup auto-calibration as part of initiation */
124 void DRV_pulse(uint8_t sequence)
126 DRV_write(DRV_GO, 0x00);
127 DRV_write(DRV_WAVEFORM_SEQ_1, sequence);
128 DRV_write(DRV_GO, 0x01);