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1 #include "mk20dx128.h"
2
3
4 extern unsigned long _stext;
5 extern unsigned long _etext;
6 extern unsigned long _sdata;
7 extern unsigned long _edata;
8 extern unsigned long _sbss;
9 extern unsigned long _ebss;
10 extern unsigned long _estack;
11 //extern void __init_array_start(void);
12 //extern void __init_array_end(void);
13 extern int main (void);
14 void ResetHandler(void);
15 void _init_Teensyduino_internal_(void);
16 void __libc_init_array(void);
17
18
19 void fault_isr(void)
20 {
21         while (1); // die
22 }
23
24 void unused_isr(void)
25 {
26         while (1); // die
27 }
28
29 extern volatile uint32_t systick_millis_count;
30 void systick_default_isr(void)
31 {
32         systick_millis_count++;
33 }
34
35 void nmi_isr(void)              __attribute__ ((weak, alias("unused_isr")));
36 void hard_fault_isr(void)       __attribute__ ((weak, alias("unused_isr")));
37 void memmanage_fault_isr(void)  __attribute__ ((weak, alias("unused_isr")));
38 void bus_fault_isr(void)        __attribute__ ((weak, alias("unused_isr")));
39 void usage_fault_isr(void)      __attribute__ ((weak, alias("unused_isr")));
40 void svcall_isr(void)           __attribute__ ((weak, alias("unused_isr")));
41 void debugmonitor_isr(void)     __attribute__ ((weak, alias("unused_isr")));
42 void pendablesrvreq_isr(void)   __attribute__ ((weak, alias("unused_isr")));
43 void systick_isr(void)          __attribute__ ((weak, alias("systick_default_isr")));
44
45 void dma_ch0_isr(void)          __attribute__ ((weak, alias("unused_isr")));
46 void dma_ch1_isr(void)          __attribute__ ((weak, alias("unused_isr")));
47 void dma_ch2_isr(void)          __attribute__ ((weak, alias("unused_isr")));
48 void dma_ch3_isr(void)          __attribute__ ((weak, alias("unused_isr")));
49 void dma_error_isr(void)        __attribute__ ((weak, alias("unused_isr")));
50 void flash_cmd_isr(void)        __attribute__ ((weak, alias("unused_isr")));
51 void flash_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
52 void low_voltage_isr(void)      __attribute__ ((weak, alias("unused_isr")));
53 void wakeup_isr(void)           __attribute__ ((weak, alias("unused_isr")));
54 void watchdog_isr(void)         __attribute__ ((weak, alias("unused_isr")));
55 void i2c0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
56 void spi0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
57 void i2s0_tx_isr(void)          __attribute__ ((weak, alias("unused_isr")));
58 void i2s0_rx_isr(void)          __attribute__ ((weak, alias("unused_isr")));
59 void uart0_lon_isr(void)        __attribute__ ((weak, alias("unused_isr")));
60 void uart0_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
61 void uart0_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
62 void uart1_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
63 void uart1_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
64 void uart2_status_isr(void)     __attribute__ ((weak, alias("unused_isr")));
65 void uart2_error_isr(void)      __attribute__ ((weak, alias("unused_isr")));
66 void adc0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
67 void cmp0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
68 void cmp1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
69 void ftm0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
70 void ftm1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
71 void cmt_isr(void)              __attribute__ ((weak, alias("unused_isr")));
72 void rtc_alarm_isr(void)        __attribute__ ((weak, alias("unused_isr")));
73 void rtc_seconds_isr(void)      __attribute__ ((weak, alias("unused_isr")));
74 void pit0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
75 void pit1_isr(void)             __attribute__ ((weak, alias("unused_isr")));
76 void pit2_isr(void)             __attribute__ ((weak, alias("unused_isr")));
77 void pit3_isr(void)             __attribute__ ((weak, alias("unused_isr")));
78 void pdb_isr(void)              __attribute__ ((weak, alias("unused_isr")));
79 void usb_isr(void)              __attribute__ ((weak, alias("unused_isr")));
80 void usb_charge_isr(void)       __attribute__ ((weak, alias("unused_isr")));
81 void tsi0_isr(void)             __attribute__ ((weak, alias("unused_isr")));
82 void mcg_isr(void)              __attribute__ ((weak, alias("unused_isr")));
83 void lptmr_isr(void)            __attribute__ ((weak, alias("unused_isr")));
84 void porta_isr(void)            __attribute__ ((weak, alias("unused_isr")));
85 void portb_isr(void)            __attribute__ ((weak, alias("unused_isr")));
86 void portc_isr(void)            __attribute__ ((weak, alias("unused_isr")));
87 void portd_isr(void)            __attribute__ ((weak, alias("unused_isr")));
88 void porte_isr(void)            __attribute__ ((weak, alias("unused_isr")));
89 void software_isr(void)         __attribute__ ((weak, alias("unused_isr")));
90
91
92 // TODO: create AVR-stype ISR() macro, with default linkage to undefined handler
93 //
94 __attribute__ ((section(".vectors"), used))
95 void (* const gVectors[])(void) =
96 {
97         (void (*)(void))((unsigned long)&_estack),      //  0 ARM: Initial Stack Pointer
98         ResetHandler,                                   //  1 ARM: Initial Program Counter
99         nmi_isr,                                        //  2 ARM: Non-maskable Interrupt (NMI)
100         hard_fault_isr,                                 //  3 ARM: Hard Fault
101         memmanage_fault_isr,                            //  4 ARM: MemManage Fault
102         bus_fault_isr,                                  //  5 ARM: Bus Fault
103         usage_fault_isr,                                //  6 ARM: Usage Fault
104         fault_isr,                                      //  7 --
105         fault_isr,                                      //  8 --
106         fault_isr,                                      //  9 --
107         fault_isr,                                      // 10 --
108         svcall_isr,                                     // 11 ARM: Supervisor call (SVCall)
109         debugmonitor_isr,                               // 12 ARM: Debug Monitor
110         fault_isr,                                      // 13 --
111         pendablesrvreq_isr,                             // 14 ARM: Pendable req serv(PendableSrvReq)
112         systick_isr,                                    // 15 ARM: System tick timer (SysTick)
113         dma_ch0_isr,                                    // 16 DMA channel 0 transfer complete
114         dma_ch1_isr,                                    // 17 DMA channel 1 transfer complete
115         dma_ch2_isr,                                    // 18 DMA channel 2 transfer complete
116         dma_ch3_isr,                                    // 19 DMA channel 3 transfer complete
117         dma_error_isr,                                  // 20 DMA error interrupt channel
118         unused_isr,                                     // 21 DMA --
119         flash_cmd_isr,                                  // 22 Flash Memory Command complete
120         flash_error_isr,                                // 23 Flash Read collision
121         low_voltage_isr,                                // 24 Low-voltage detect/warning
122         wakeup_isr,                                     // 25 Low Leakage Wakeup
123         watchdog_isr,                                   // 26 Both EWM and WDOG interrupt
124         i2c0_isr,                                       // 27 I2C0
125         spi0_isr,                                       // 28 SPI0
126         i2s0_tx_isr,                                    // 29 I2S0 Transmit
127         i2s0_rx_isr,                                    // 30 I2S0 Receive
128         uart0_lon_isr,                                  // 31 UART0 CEA709.1-B (LON) status
129         uart0_status_isr,                               // 32 UART0 status
130         uart0_error_isr,                                // 33 UART0 error
131         uart1_status_isr,                               // 34 UART1 status
132         uart1_error_isr,                                // 35 UART1 error
133         uart2_status_isr,                               // 36 UART2 status
134         uart2_error_isr,                                // 37 UART2 error
135         adc0_isr,                                       // 38 ADC0
136         cmp0_isr,                                       // 39 CMP0
137         cmp1_isr,                                       // 40 CMP1
138         ftm0_isr,                                       // 41 FTM0
139         ftm1_isr,                                       // 42 FTM1
140         cmt_isr,                                        // 43 CMT
141         rtc_alarm_isr,                                  // 44 RTC Alarm interrupt
142         rtc_seconds_isr,                                // 45 RTC Seconds interrupt
143         pit0_isr,                                       // 46 PIT Channel 0
144         pit1_isr,                                       // 47 PIT Channel 1
145         pit2_isr,                                       // 48 PIT Channel 2
146         pit3_isr,                                       // 49 PIT Channel 3
147         pdb_isr,                                        // 50 PDB Programmable Delay Block
148         usb_isr,                                        // 51 USB OTG
149         usb_charge_isr,                                 // 52 USB Charger Detect
150         tsi0_isr,                                       // 53 TSI0
151         mcg_isr,                                        // 54 MCG
152         lptmr_isr,                                      // 55 Low Power Timer
153         porta_isr,                                      // 56 Pin detect (Port A)
154         portb_isr,                                      // 57 Pin detect (Port B)
155         portc_isr,                                      // 58 Pin detect (Port C)
156         portd_isr,                                      // 59 Pin detect (Port D)
157         porte_isr,                                      // 60 Pin detect (Port E)
158         software_isr,                                   // 61 Software interrupt
159 };
160
161 //void usb_isr(void)
162 //{
163 //}
164
165 __attribute__ ((section(".flashconfig"), used))
166 const uint8_t flashconfigbytes[16] = {
167         0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
168         0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF
169 };
170
171
172 // Automatically initialize the RTC.  When the build defines the compile
173 // time, and the user has added a crystal, the RTC will automatically
174 // begin at the time of the first upload.
175 #ifndef TIME_T
176 #define TIME_T 1349049600 // default 1 Oct 2012
177 #endif
178 extern void rtc_set(unsigned long t);
179
180
181
182 void startup_unused_hook(void) {}
183 void startup_early_hook(void)           __attribute__ ((weak, alias("startup_unused_hook")));
184 void startup_late_hook(void)            __attribute__ ((weak, alias("startup_unused_hook")));
185
186
187 __attribute__ ((section(".startup")))
188 void ResetHandler(void)
189 {
190         uint32_t *src = &_etext;
191         uint32_t *dest = &_sdata;
192
193         WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
194         WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
195         WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;
196         startup_early_hook();
197
198         // enable clocks to always-used peripherals
199         SIM_SCGC5 = 0x00043F82;         // clocks active to all GPIO
200         SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
201         // if the RTC oscillator isn't enabled, get it started early
202         if (!(RTC_CR & RTC_CR_OSCE)) {
203                 RTC_SR = 0;
204                 RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
205         }
206
207         // TODO: do this while the PLL is waiting to lock....
208         while (dest < &_edata) *dest++ = *src++;
209         dest = &_sbss;
210         while (dest < &_ebss) *dest++ = 0;
211         SCB_VTOR = 0;   // use vector table in flash
212
213         // start in FEI mode
214         // enable capacitors for crystal
215         OSC0_CR = OSC_SC8P | OSC_SC2P;
216         // enable osc, 8-32 MHz range, low power mode
217         MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
218         // switch to crystal as clock source, FLL input = 16 MHz / 512
219         MCG_C1 =  MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
220         // wait for crystal oscillator to begin
221         while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
222         // wait for FLL to use oscillator
223         while ((MCG_S & MCG_S_IREFST) != 0) ;
224         // wait for MCGOUT to use oscillator
225         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
226         // now we're in FBE mode
227         // config PLL input for 16 MHz Crystal / 4 = 4 MHz
228         MCG_C5 = MCG_C5_PRDIV0(3);
229         // config PLL for 96 MHz output
230         MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
231         // wait for PLL to start using xtal as its input
232         while (!(MCG_S & MCG_S_PLLST)) ;
233         // wait for PLL to lock
234         while (!(MCG_S & MCG_S_LOCK0)) ;
235         // now we're in PBE mode
236 #if F_CPU == 96000000
237         // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
238         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);
239 #elif F_CPU == 48000000
240         // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash
241         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);
242 #elif F_CPU == 24000000
243         // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
244         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |  SIM_CLKDIV1_OUTDIV4(3);
245 #else
246 #error "Error, F_CPU must be 96000000, 48000000, or 24000000"
247 #endif
248         // switch to PLL as clock source, FLL input = 16 MHz / 512
249         MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
250         // wait for PLL clock to be used
251         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
252         // now we're in PEE mode
253         // configure USB for 48 MHz clock
254         SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2
255         // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
256         SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
257
258         // initialize the SysTick counter
259         SYST_RVR = (F_CPU / 1000) - 1;
260         SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
261
262         //init_pins();
263         __enable_irq();
264
265         //_init_Teensyduino_internal_(); XXX HaaTa - Why is this here? Perhaps fixed in a new version of the API?
266         //if (RTC_SR & RTC_SR_TIF) rtc_set(TIME_T); XXX HaaTa - We don't care about the rtc
267
268         __libc_init_array();
269
270 /*
271         for (ptr = &__init_array_start; ptr < &__init_array_end; ptr++) {
272                 (*ptr)();
273         }
274 */
275         startup_late_hook();
276         main();
277         while (1) ;
278 }
279
280 // TODO: is this needed for c++ and where does it come from?
281 /*
282 void _init(void)
283 {
284 }
285 */
286
287
288 void * _sbrk(int incr)
289 {
290         static char *heap_end = (char *)&_ebss;
291         char *prev = heap_end;
292
293         heap_end += incr;
294         return prev;
295 }
296
297 int _read(int file, char *ptr, int len)
298 {
299         return 0;
300 }
301
302 int _write(int file, char *ptr, int len)
303 {
304         return 0;
305 }
306
307 int _close(int fd)
308 {
309         return -1;
310 }
311
312 int _lseek(int fd, long long offset, int whence)
313 {
314         return -1;
315 }
316
317 void _exit(int status)
318 {
319         while (1);
320 }
321
322 void __cxa_pure_virtual()
323 {
324         while (1);
325 }
326
327
328